diff options
author | Roshni Shah <shah.roshni@yahoo.com> | 2011-03-14 06:49:42 -0400 |
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committer | Justin Waters <justin.waters@timesys.com> | 2012-03-02 16:59:46 -0500 |
commit | 2731b2eadeaa141e6f305fa8086106608112bbaa (patch) | |
tree | 2702d45bac84073cd580ccb1bd3eafb9a000d3b6 /arch/arm/mach-mx28/include/mach/dma.h | |
parent | 6d23f5084c975be637f7d748db82116bf84d3872 (diff) |
Add support for the i.MX53 QSB2.6.35.3-mx53-early-201103141049
This patch seems to have originated from the 11.01.00 release
from Freescale, which is no longer available except through the
gitweb interface from Freescale.
http://opensource.freescale.com/git?p=imx/linux-2.6-imx.git;a=commit;h=27fdf7bae11978d21e8aba09bb635f49b07edd4a
Diffstat (limited to 'arch/arm/mach-mx28/include/mach/dma.h')
-rw-r--r-- | arch/arm/mach-mx28/include/mach/dma.h | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/arch/arm/mach-mx28/include/mach/dma.h b/arch/arm/mach-mx28/include/mach/dma.h new file mode 100644 index 000000000000..ad8076c5d8f3 --- /dev/null +++ b/arch/arm/mach-mx28/include/mach/dma.h @@ -0,0 +1,59 @@ +/* + * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#ifndef __ASM_ARCH_MACH_DMA_H__ +#define __ASM_ARCH_MACH_DMA_H__ + +enum { + MXS_DMA_CHANNEL_AHB_APBH = 0, + MXS_DMA_CHANNEL_AHB_APBH_SSP0 = MXS_DMA_CHANNEL_AHB_APBH, + MXS_DMA_CHANNEL_AHB_APBH_SSP1, + MXS_DMA_CHANNEL_AHB_APBH_SSP2, + MXS_DMA_CHANNEL_AHB_APBH_SSP3, + MXS_DMA_CHANNEL_AHB_APBH_GPMI0, + MXS_DMA_CHANNEL_AHB_APBH_GPMI1, + MXS_DMA_CHANNEL_AHB_APBH_GPMI2, + MXS_DMA_CHANNEL_AHB_APBH_GPMI3, + MXS_DMA_CHANNEL_AHB_APBH_GPMI4, + MXS_DMA_CHANNEL_AHB_APBH_GPMI5, + MXS_DMA_CHANNEL_AHB_APBH_GPMI6, + MXS_DMA_CHANNEL_AHB_APBH_GPMI7, + MXS_DMA_CHANNEL_AHB_APBH_HSADC, + MXS_DMA_CHANNEL_AHB_APBH_LCDIF, + MXS_DMA_CHANNEL_AHB_APBH_14, + MXS_DMA_CHANNEL_AHB_APBH_15, + MXS_DMA_CHANNEL_AHB_APBX = 16, + MXS_DMA_CHANNEL_AHB_APBX_UART4_RX = MXS_DMA_CHANNEL_AHB_APBX, + MXS_DMA_CHANNEL_AHB_APBX_UART4_TX, + MXS_DMA_CHANNEL_AHB_APBX_SPDIF, + MXS_DMA_CHANNEL_AHB_APBX_03, + MXS_DMA_CHANNEL_AHB_APBX_SAIF0, + MXS_DMA_CHANNEL_AHB_APBX_SAIF1, + MXS_DMA_CHANNEL_AHB_APBX_I2C0, + MXS_DMA_CHANNEL_AHB_APBX_I2C1, + MXS_DMA_CHANNEL_AHB_APBX_UART0_RX, + MXS_DMA_CHANNEL_AHB_APBX_UART0_TX, + MXS_DMA_CHANNEL_AHB_APBX_UART1_RX, + MXS_DMA_CHANNEL_AHB_APBX_UART1_TX, + MXS_DMA_CHANNEL_AHB_APBX_UART2_RX, + MXS_DMA_CHANNEL_AHB_APBX_UART2_TX, + MXS_DMA_CHANNEL_AHB_APBX_UART3_RX, + MXS_DMA_CHANNEL_AHB_APBX_UART3_TX, + MAX_DMA_CHANNELS, +}; +#endif /* __ASM_ARCH_MACH_MX28_H__ */ |