summaryrefslogtreecommitdiff
path: root/arch/arm/mach-mx5/board-mx51_babbage.c
diff options
context:
space:
mode:
authorDinh Nguyen <Dinh.Nguyen@freescale.com>2010-05-17 10:46:01 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2010-05-18 10:46:31 +0200
commitd6b273bfdfd3667387f2516c4a3602b691535ee3 (patch)
tree135f0dc9b1ecd25f9beb65e14b4bc0b3629b148b /arch/arm/mach-mx5/board-mx51_babbage.c
parent4a870fc898db90033585cef35d89cf931e189fa4 (diff)
mx5: bring usb phy out of reset on freescale mx51 babbage hw
This patch de-asserts the reset line that is connected to the USB ULPI PHY on USB Host1. This patch should be included with the original USB host enablement set of patches of mx51 babbage hw, but was accidentily left out. Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx5/board-mx51_babbage.c')
-rw-r--r--arch/arm/mach-mx5/board-mx51_babbage.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index dacf506f18ba..ed885f9d7b73 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -33,6 +33,7 @@
#define BABBAGE_USB_HUB_RESET (0*32 + 7) /* GPIO_1_7 */
#define BABBAGE_USBH1_STP (0*32 + 27) /* GPIO_1_27 */
+#define BABBAGE_PHY_RESET (1*32 +5) /* GPIO_2_5 */
/* USB_CTRL_1 */
#define MX51_USB_CTRL_1_OFFSET 0x10
@@ -101,6 +102,7 @@ static inline void mxc_init_imx_uart(void)
static int gpio_usbh1_active(void)
{
struct pad_desc usbh1stp_gpio = MX51_PAD_USBH1_STP__GPIO_1_27;
+ struct pad_desc phyreset_gpio = MX51_PAD_EIM_D21__GPIO_2_5;
int ret;
/* Set USBH1_STP to GPIO and toggle it */
@@ -115,6 +117,16 @@ static int gpio_usbh1_active(void)
gpio_set_value(BABBAGE_USBH1_STP, 1);
msleep(100);
gpio_free(BABBAGE_USBH1_STP);
+
+ /* De-assert USB PHY RESETB */
+ mxc_iomux_v3_setup_pad(&phyreset_gpio);
+ ret = gpio_request(BABBAGE_PHY_RESET, "phy_reset");
+
+ if (ret) {
+ pr_debug("failed to get MX51_PAD_EIM_D21__GPIO_2_5: %d\n", ret);
+ return ret;
+ }
+ gpio_direction_output(BABBAGE_PHY_RESET, 1);
return 0;
}