ENGR00140265 mx53 smd: add support for hardware pin controlled suspend

Add support for hardware pin controlled suspend for mx53 smd revB,
Also reduce DRAM_SDCLK drive strength for both mx51 and mx53 on suspend

1)First need to rework revB to connect pmic_stdby_req with DA9053 sys_en_gpio8
to support hardware pin suspend
2)for revB with new OTP DA9053 chip, any irq can wake up the system reliably
3)for revB with old OTP DA9053 chip, need to rework pwron key and only pwron
key irq can wake up the system reliably
4)for mx53 smd revA and loco board still use sw command to suspend, and resume
it not stable

Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
Signed-off-by: Alex Gonzalez <alex.gonzalez@digi.com>

1 files changed, 79 insertions, 1 deletions

diff --git a/arch/arm/mach-mx5/pm_da9053.c b/arch/arm/mach-mx5/pm_da9053.c
index 6e24fb2823d4..435e286d0583 100644
--- a/arch/arm/mach-mx5/pm_da9053.c
+++ b/arch/arm/mach-mx5/pm_da9053.c
@@ -30,6 +30,7 @@
 #include <linux/clk.h>
 #include <linux/mfd/da9052/reg.h>
 
+#include <asm/mach-types.h>
 #include <mach/hardware.h>
 #include <mach/i2c.h>
 
@@ -319,8 +320,23 @@ static void pm_da9053_preset_voltage(void)
 	pm_da9053_write_reg(DA9052_LDO10_REG, iLDO10_SUSPEND_PRESET);
 }
 
+void pm_da9053_dump(int start, int end)
+{
+	u8 reg, data;
+	for (reg = start; reg <= end; reg++) {
+		pm_da9053_read_reg(reg, &data);
+		pr_info("reg %u = 0x%2x\n",
+			reg, data);
+	}
+}
+
 #define DA9053_SLEEP_DELAY 0x1f
-int da9053_suspend_cmd(void)
+
+#define DA9052_CONTROLC_SMD_SET 0x62
+#define DA9052_GPIO0809_SMD_SET 0x18
+#define DA9052_ID1415_SMD_SET 0x1
+
+int da9053_suspend_cmd_sw(void)
 {
 	unsigned char buf[2] = {0, 0};
 	struct clk *i2c_clk;
@@ -351,6 +367,45 @@ int da9053_suspend_cmd(void)
 	return 0;
 }
 
+
+int da9053_suspend_cmd_hw(void)
+{
+	unsigned char buf[2] = {0, 0};
+	struct clk *i2c_clk;
+	u8 data;
+	buf[0] = 29;
+
+	i2c_clk = clk_get(NULL, "i2c_clk");
+	if (IS_ERR(i2c_clk)) {
+		pr_err("unable to get i2c clk\n");
+		return PTR_ERR(i2c_clk);
+	}
+	clk_enable(i2c_clk);
+
+	pm_da9053_preset_voltage();
+	pm_da9053_write_reg(DA9052_CONTROLC_REG,
+				DA9052_CONTROLC_SMD_SET);
+
+	pm_da9053_read_reg(DA9052_ID01_REG, &data);
+	data &= ~(DA9052_ID01_DEFSUPPLY | DA9052_ID01_nRESMODE);
+	pm_da9053_write_reg(DA9052_ID01_REG, data);
+
+	pm_da9053_write_reg(DA9052_GPIO0809_REG,
+			DA9052_GPIO0809_SMD_SET);
+
+	pm_da9053_read_reg(DA9052_ID1415_REG, &data);
+	data &= 0xf0;
+	data |= DA9052_ID1415_SMD_SET;
+	pm_da9053_write_reg(DA9052_ID1415_REG, data);
+
+	pm_da9053_write_reg(DA9052_SEQTIMER_REG, 0);
+	/* pm_da9053_write_reg(DA9052_SEQB_REG, 0x1f); */
+
+	clk_disable(i2c_clk);
+	clk_put(i2c_clk);
+	return 0;
+}
+
 void da9053_restore_volt_settings(void)
 {
 	u8 reg;
@@ -383,3 +438,26 @@ int da9053_poweroff_cmd(void)
 	return 0;
 }
 
+int da9053_resume_dump(void)
+{
+	unsigned char buf[2] = {0, 0};
+	struct clk *i2c_clk;
+	buf[0] = 29;
+
+	i2c_clk = clk_get(NULL, "i2c_clk");
+	if (IS_ERR(i2c_clk)) {
+		pr_err("unable to get i2c clk\n");
+		return PTR_ERR(i2c_clk);
+	}
+	clk_enable(i2c_clk);
+
+	pm_da9053_dump(46, 59);
+	pm_da9053_dump(25, 25);
+	pm_da9053_dump(29, 29);
+	pm_da9053_dump(36, 36);
+
+	clk_disable(i2c_clk);
+	clk_put(i2c_clk);
+	return 0;
+}
+