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| author | Nancy Chen <Nancy.Chen@freescale.com> | 2012-10-15 10:52:08 -0500 |
|---|---|---|
| committer | Nancy Chen <Nancy.Chen@freescale.com> | 2012-10-15 18:37:49 -0500 |
| commit | e04ee6190b8e2344b59f9b14b9b4012cd0f52ebf (patch) | |
| tree | 32afbdd8a9d96298daca43c81a6a4a57a24076c8 /arch/arm/mach-mx6/board-mx6sl_common.h | |
| parent | e29ecfd09fc4d808b5dd0dc5a2d1b2d27a6063b9 (diff) | |
ENGR00229708 [MX6SL] Fix all build warnings.
Fix all build warnings in files:
arch/arm/mach-mx6/board-mx6sl_common.h
arch/arm/mach-mx6/board-mx6sl_evk.c
arch/arm/mach-mx6/clock_mx6sl.c
arch/arm/mach-mx6/cpu_regulator-mx6.c
arch/arm/mach-mx6/pm.c
arch/arm/mach-mx6/system.c
arch/arm/plat-mxc/dvfs_core.c
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
Diffstat (limited to 'arch/arm/mach-mx6/board-mx6sl_common.h')
| -rw-r--r-- | arch/arm/mach-mx6/board-mx6sl_common.h | 29 |
1 files changed, 0 insertions, 29 deletions
diff --git a/arch/arm/mach-mx6/board-mx6sl_common.h b/arch/arm/mach-mx6/board-mx6sl_common.h index 4a04cbea0694..c432e0a661ba 100644 --- a/arch/arm/mach-mx6/board-mx6sl_common.h +++ b/arch/arm/mach-mx6/board-mx6sl_common.h @@ -389,40 +389,11 @@ static iomux_v3_cfg_t mx6sl_brd_spdc_disable_pads[] = { MX6SL_PAD_EPDC_PWRWAKEUP__GPIO_2_14, }; -static iomux_v3_cfg_t mx6sl_brd_csi_enable_pads[] = { - MX6SL_PAD_EPDC_GDRL__CSI_MCLK, - MX6SL_PAD_EPDC_SDCE3__I2C3_SDA, - MX6SL_PAD_EPDC_SDCE2__I2C3_SCL, - MX6SL_PAD_EPDC_GDCLK__CSI_PIXCLK, - MX6SL_PAD_EPDC_GDSP__CSI_VSYNC, - MX6SL_PAD_EPDC_GDOE__CSI_HSYNC, - MX6SL_PAD_EPDC_SDLE__CSI_D_9, - MX6SL_PAD_EPDC_SDCLK__CSI_D_8, - MX6SL_PAD_EPDC_D7__CSI_D_7, - MX6SL_PAD_EPDC_D6__CSI_D_6, - MX6SL_PAD_EPDC_D5__CSI_D_5, - MX6SL_PAD_EPDC_D4__CSI_D_4, - MX6SL_PAD_EPDC_D3__CSI_D_3, - MX6SL_PAD_EPDC_D2__CSI_D_2, - MX6SL_PAD_EPDC_D1__CSI_D_1, - MX6SL_PAD_EPDC_D0__CSI_D_0, - - MX6SL_PAD_EPDC_SDSHR__GPIO_1_26, /* CMOS_RESET_B GPIO */ - MX6SL_PAD_EPDC_SDOE__GPIO_1_25, /* CMOS_PWDN GPIO */ -}; - static iomux_v3_cfg_t mx6sl_brd_elan_pads[] = { MX6SL_PAD_EPDC_PWRCTRL3__GPIO_2_10, /* INT */ MX6SL_PAD_EPDC_PWRCTRL2__GPIO_2_9, /* CE */ MX6SL_PAD_KEY_COL6__GPIO_4_4, /* RST */ }; - /* uart2 pins */ -static iomux_v3_cfg_t mx6sl_uart2_pads[] = { - MX6SL_PAD_SD2_DAT5__UART2_TXD, - MX6SL_PAD_SD2_DAT4__UART2_RXD, - MX6SL_PAD_SD2_DAT6__UART2_RTS, - MX6SL_PAD_SD2_DAT7__UART2_CTS, -}; #define MX6SL_USDHC_8BIT_PAD_SETTING(id, speed) \ mx6sl_sd##id##_##speed##mhz[] = { \ |