diff options
author | Ranjani Vaidyanathan <ra5478@freescale.com> | 2013-04-23 23:39:38 -0500 |
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committer | Ranjani Vaidyanathan <ra5478@freescale.com> | 2013-05-20 16:16:57 -0500 |
commit | 6f394da8b374dc4a063209deedeb5d8a62ae4c74 (patch) | |
tree | 938507482ba43d94c30bdfa2d8be4cce392ddd8c /arch/arm/mach-mx6/board-mx6sl_evk.c | |
parent | 8e618cc8d34be0c51f01393df838f707c4a5e8f8 (diff) |
ENGR00262832 MX6SL-Lower Audio playback power.
Move MMDC to be sourced from PLL2_200M in audio mode.
Set the DDR freq to be 100MHz in audio mode.
Add code to drop DDR to 25MHz when ARM is in WFI while
playing audio. This will be the case when SDMA is transferring
data from the audio buffer in IRAM. Also float the DDR IO
pins in this state.
Set Audio PLL to bypass mode.
Source both WM8962 and SSI2 from audio PLL (PLL4).
Set AHB to 8MHz in Audio playback mode when ARM is going to enter WFI.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
Diffstat (limited to 'arch/arm/mach-mx6/board-mx6sl_evk.c')
-rw-r--r-- | arch/arm/mach-mx6/board-mx6sl_evk.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/arch/arm/mach-mx6/board-mx6sl_evk.c b/arch/arm/mach-mx6/board-mx6sl_evk.c index a2dfd4109977..3ae48c6e6d10 100644 --- a/arch/arm/mach-mx6/board-mx6sl_evk.c +++ b/arch/arm/mach-mx6/board-mx6sl_evk.c @@ -539,8 +539,16 @@ static int mxc_wm8962_init(void) return PTR_ERR(extern_audio_root); } - rate = clk_round_rate(extern_audio_root, 24000000); - clk_set_rate(extern_audio_root, rate); + pll4 = clk_get(NULL, "pll4"); + if (IS_ERR(pll4)) { + pr_err("can't get pll4 clock.\n"); + return PTR_ERR(pll4); + } + + clk_set_parent(extern_audio_root, pll4); + + rate = 24000000; + clk_set_rate(extern_audio_root, 24000000); wm8962_data.sysclk = rate; /* set AUDMUX pads to 1.8v */ |