diff options
author | Anson Huang <b20788@freescale.com> | 2012-06-18 10:58:22 +0800 |
---|---|---|
committer | Anson Huang <b20788@freescale.com> | 2012-06-19 10:33:02 +0800 |
commit | 6fa227eaa4196bc6c8b84a3404305d38855f8750 (patch) | |
tree | 889c768ab18a4dd4b0dc76d35a1f363f509e2f05 /arch/arm/mach-mx6/bus_freq.c | |
parent | 18cc49c15de3fd99a334eef49ec8119e46115919 (diff) |
ENGR00213903 [MX6]Improve periph parent change flow
When bus freq is changed, we need to update periph
clk's parent, better to use clk_set_parent API instead
of changing the parent directly.
Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'arch/arm/mach-mx6/bus_freq.c')
-rw-r--r-- | arch/arm/mach-mx6/bus_freq.c | 18 |
1 files changed, 4 insertions, 14 deletions
diff --git a/arch/arm/mach-mx6/bus_freq.c b/arch/arm/mach-mx6/bus_freq.c index b573f09c8920..9420283b0773 100644 --- a/arch/arm/mach-mx6/bus_freq.c +++ b/arch/arm/mach-mx6/bus_freq.c @@ -100,16 +100,7 @@ static struct clk *periph_clk; static struct clk *osc; static struct delayed_work low_bus_freq_handler; -extern void update_usecount(struct clk *clk, bool flag); -static inline void update_periph_clk_parent(struct clk *new_parent) -{ - update_usecount(periph_clk->parent, false); - - periph_clk->parent = new_parent; - - update_usecount(periph_clk->parent, true); -} static void reduce_bus_freq_handler(struct work_struct *work) { unsigned long reg; @@ -142,14 +133,13 @@ static void reduce_bus_freq_handler(struct work_struct *work) clk_enable(pll2_400); update_ddr_freq(50000000); /* Make sure periph clk's parent also got updated */ - update_periph_clk_parent(pll2_200); - + clk_set_parent(periph_clk, pll2_200); audio_bus_freq_mode = 1; low_bus_freq_mode = 0; } else { update_ddr_freq(24000000); /* Make sure periph clk's parent also got updated */ - update_periph_clk_parent(osc); + clk_set_parent(periph_clk, osc); if (audio_bus_freq_mode) clk_disable(pll2_400); low_bus_freq_mode = 1; @@ -277,7 +267,7 @@ int set_high_bus_freq(int high_bus_freq) if (high_bus_freq) { update_ddr_freq(ddr_normal_rate); /* Make sure periph clk's parent also got updated */ - update_periph_clk_parent(pll2); + clk_set_parent(periph_clk, pll2); if (med_bus_freq_mode) clk_disable(pll2_400); high_bus_freq_mode = 1; @@ -286,7 +276,7 @@ int set_high_bus_freq(int high_bus_freq) clk_enable(pll2_400); update_ddr_freq(ddr_med_rate); /* Make sure periph clk's parent also got updated */ - update_periph_clk_parent(pll2_400); + clk_set_parent(periph_clk, pll2_400); high_bus_freq_mode = 0; med_bus_freq_mode = 1; } |