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authorAllen Xu <allen.xu@freescale.com>2012-04-17 14:53:22 +0800
committerAllen Xu <allen.xu@freescale.com>2012-04-17 15:00:13 +0800
commitfbfbb4852074a3f2bef7fd2399df448d93df041f (patch)
tree8fdd1d36ba5efa6d55c224bf8f352f51048ce176 /arch/arm/mach-mx6/clock.c
parent6a7f8a225c42c0976df2f03bd2ce5222b96477d9 (diff)
ENGR00179804 change NAND clock source from pll2_pfd_352M to pll2_pfd_400M
Due to pll2_pfd_352M would be used for LVDS, change NAND clock source to pll2_pfd_400M. Signed-off-by: Allen Xu <allen.xu@freescale.com>
Diffstat (limited to 'arch/arm/mach-mx6/clock.c')
-rw-r--r--arch/arm/mach-mx6/clock.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-mx6/clock.c b/arch/arm/mach-mx6/clock.c
index d83d4e4923e4..b766627cd8f4 100644
--- a/arch/arm/mach-mx6/clock.c
+++ b/arch/arm/mach-mx6/clock.c
@@ -3874,7 +3874,7 @@ static int _clk_enfc_set_rate(struct clk *clk, unsigned long rate)
static struct clk enfc_clk = {
__INIT_CLK_DEBUG(enfc_clk)
.id = 0,
- .parent = &pll2_pfd_352M,
+ .parent = &pll2_pfd_400M,
.enable_reg = MXC_CCM_CCGR2,
.enable_shift = MXC_CCM_CCGRx_CG7_OFFSET,
.enable = _clk_enable,