diff options
| author | Ranjani Vaidyanathan <ra5478@freescale.com> | 2012-04-16 13:30:36 -0500 |
|---|---|---|
| committer | Jason Liu <r64343@freescale.com> | 2012-07-20 13:36:18 +0800 |
| commit | 16439ee6f79311ed26988c12b68b960b66406390 (patch) | |
| tree | 49ed850b097013381902f186e86264090cdac98c /arch/arm/mach-mx6/clock.c | |
| parent | d6827689b0370c79cf2d6abb1a9a81f639399e4f (diff) | |
ENGR00179747: MX6DL-Fix boot failure
Fix the boot failure caused by:
8f0c21e06d4f7d0c7c078d6261ccd75f2a45c3ab
MX6- Add bus frequency scaling support
There is no SATA on MX6DL. Accessing SATA PHYs early in the boot
process causes the system to crash.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
Diffstat (limited to 'arch/arm/mach-mx6/clock.c')
| -rw-r--r-- | arch/arm/mach-mx6/clock.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm/mach-mx6/clock.c b/arch/arm/mach-mx6/clock.c index 47ee9b7956ae..a5b22d8dd34d 100644 --- a/arch/arm/mach-mx6/clock.c +++ b/arch/arm/mach-mx6/clock.c @@ -5297,10 +5297,12 @@ int __init mx6_clocks_init(unsigned long ckil, unsigned long osc, lp_med_freq = 0; /* Turn OFF all unnecessary PHYs. */ - /* Turn off SATA PHY. */ - base = ioremap(MX6Q_SATA_BASE_ADDR, SZ_8K); - reg = __raw_readl(base + PORT_PHY_CTL); - __raw_writel(reg | PORT_PHY_CTL_PDDQ_LOC, base + PORT_PHY_CTL); + if (cpu_is_mx6q()) { + /* Turn off SATA PHY. */ + base = ioremap(MX6Q_SATA_BASE_ADDR, SZ_8K); + reg = __raw_readl(base + PORT_PHY_CTL); + __raw_writel(reg | PORT_PHY_CTL_PDDQ_LOC, base + PORT_PHY_CTL); + } /* Turn off HDMI PHY. */ base = ioremap(MX6Q_HDMI_ARB_BASE_ADDR, SZ_128K); |