diff options
author | Terry Lv <r65388@freescale.com> | 2012-03-09 11:25:31 +0800 |
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committer | Jason Liu <r64343@freescale.com> | 2012-07-20 13:23:53 +0800 |
commit | ea248c235980d1ae084e58ed7e824133ecff368c (patch) | |
tree | 5ad11d50b52c8360fb289138c29f93d637d79470 /arch/arm/mach-mx6/clock.c | |
parent | 765af27537bbbdea4e280823e6eeecbd73f2c604 (diff) |
ENGR00176469-1: Improve the performance of MLB
Pll clock change to make pll clocked more stable.
Signed-off-by: Terry Lv <r65388@freescale.com>
Diffstat (limited to 'arch/arm/mach-mx6/clock.c')
-rw-r--r-- | arch/arm/mach-mx6/clock.c | 23 |
1 files changed, 16 insertions, 7 deletions
diff --git a/arch/arm/mach-mx6/clock.c b/arch/arm/mach-mx6/clock.c index 813c55432d70..43d5bc86f490 100644 --- a/arch/arm/mach-mx6/clock.c +++ b/arch/arm/mach-mx6/clock.c @@ -1061,22 +1061,31 @@ static int _clk_pll_mlb_main_enable(struct clk *clk) reg = __raw_readl(pllbase); reg &= ~ANADIG_PLL_BYPASS; - reg = 0x0da20000; + reg = 0x0da20800; __raw_writel(reg, pllbase); - /* Wait for PLL to lock */ - if (!WAIT(__raw_readl(pllbase) & ANADIG_PLL_LOCK, - SPIN_DELAY)) - panic("pll enable failed\n"); - return 0; } +static int _clk_pll_mlb_main_disable(struct clk *clk) +{ + unsigned int reg; + void __iomem *pllbase; + + pllbase = _get_pll_base(clk); + + reg = __raw_readl(pllbase); + + reg |= ANADIG_PLL_BYPASS; + + __raw_writel(reg, pllbase); +} + static struct clk pll6_mlb150_main_clk = { __INIT_CLK_DEBUG(pll6_mlb150_main_clk) .parent = &osc_clk, .enable = _clk_pll_mlb_main_enable, - .disable = _clk_pll_disable, + .disable = _clk_pll_mlb_main_disable, }; static unsigned long _clk_pll7_usb_otg_get_rate(struct clk *clk) |