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authorNancy Chen <Nancy.Chen@freescale.com>2012-01-25 09:00:48 -0600
committerJason Liu <r64343@freescale.com>2012-07-20 13:20:14 +0800
commit79667df5429aea47f792c2e2c84b10ff40dd4eb5 (patch)
tree261bb20e20956d4b956f7bab54e140e496e4ac2b /arch/arm/mach-mx6/mx6q_sabreauto_pmic_pfuze100.c
parentd95c8b01eb8e2d91e86bec8ed1f1eb37b406a571 (diff)
ENGR00172752-1 MX6Q: Add pfuze100 support for Sabre SD
1. Add pfuze100's init fuction on board level 2. Add mx6q_sabresd_pmic_pfuze100.c 3. Rename to sabresd Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
Diffstat (limited to 'arch/arm/mach-mx6/mx6q_sabreauto_pmic_pfuze100.c')
-rw-r--r--arch/arm/mach-mx6/mx6q_sabreauto_pmic_pfuze100.c59
1 files changed, 58 insertions, 1 deletions
diff --git a/arch/arm/mach-mx6/mx6q_sabreauto_pmic_pfuze100.c b/arch/arm/mach-mx6/mx6q_sabreauto_pmic_pfuze100.c
index ba9fb2d77c0a..6fcefd6b4600 100644
--- a/arch/arm/mach-mx6/mx6q_sabreauto_pmic_pfuze100.c
+++ b/arch/arm/mach-mx6/mx6q_sabreauto_pmic_pfuze100.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -39,6 +39,32 @@
/* 7-bit I2C bus slave address */
#define PFUZE100_I2C_ADDR (0x08)
+ /*SWBST*/
+#define PFUZE100_SW1ASTANDBY 33
+#define PFUZE100_SW1ASTANDBY_STBY_VAL (0x14)
+#define PFUZE100_SW1ASTANDBY_STBY_M (0x3f<<0)
+#define PFUZE100_SW1BSTANDBY 40
+#define PFUZE100_SW1BSTANDBY_STBY_VAL (0x14)
+#define PFUZE100_SW1BSTANDBY_STBY_M (0x3f<<0)
+#define PFUZE100_SW1CSTANDBY 47
+#define PFUZE100_SW1CSTANDBY_STBY_VAL (0x14)
+#define PFUZE100_SW1CSTANDBY_STBY_M (0x3f<<0)
+#define PFUZE100_SW2STANDBY 54
+#define PFUZE100_SW2STANDBY_STBY_VAL 0x0
+#define PFUZE100_SW2STANDBY_STBY_M (0x3f<<0)
+#define PFUZE100_SW3ASTANDBY 61
+#define PFUZE100_SW3ASTANDBY_STBY_VAL 0x0
+#define PFUZE100_SW3ASTANDBY_STBY_M (0x3f<<0)
+#define PFUZE100_SW3BSTANDBY 68
+#define PFUZE100_SW3BSTANDBY_STBY_VAL 0x0
+#define PFUZE100_SW3BSTANDBY_STBY_M (0x3f<<0)
+#define PFUZE100_SW4STANDBY 75
+#define PFUZE100_SW4STANDBY_STBY_VAL 0
+#define PFUZE100_SW4STANDBY_STBY_M (0x3f<<0)
+#define PFUZE100_SWBSTCON1 102
+#define PFUZE100_SWBSTCON1_SWBSTMOD_VAL (0x1<<2)
+#define PFUZE100_SWBSTCON1_SWBSTMOD_M (0x3<<2)
+
static struct regulator_consumer_supply sw1a_consumers[] = {
{
.supply = "P1V325_VDDARM_SW1AB",
@@ -363,6 +389,35 @@ static struct regulator_init_data vgen6_init = {
.consumer_supplies = vgen6_consumers,
};
+static int pfuze100_init(struct mc_pfuze *pfuze)
+{
+ int ret;
+ ret = pfuze_reg_rmw(pfuze, PFUZE100_SWBSTCON1,
+ PFUZE100_SWBSTCON1_SWBSTMOD_M,
+ PFUZE100_SWBSTCON1_SWBSTMOD_VAL);
+ if (ret)
+ goto err;
+ ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1ASTANDBY,
+ PFUZE100_SW1ASTANDBY_STBY_M,
+ PFUZE100_SW1ASTANDBY_STBY_VAL);
+ if (ret)
+ goto err;
+ ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1BSTANDBY,
+ PFUZE100_SW1BSTANDBY_STBY_M,
+ PFUZE100_SW1BSTANDBY_STBY_VAL);
+ if (ret)
+ goto err;
+ ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1CSTANDBY,
+ PFUZE100_SW1CSTANDBY_STBY_M,
+ PFUZE100_SW1CSTANDBY_STBY_VAL);
+ if (ret)
+ goto err;
+ return 0;
+err:
+ printk(KERN_ERR "pfuze100 init error!\n");
+ return -1;
+}
+
static struct pfuze_regulator_init_data mx6q_sabreauto_pfuze100_regulators[] = {
{.id = PFUZE100_SW1A, .init_data = &sw1a_init},
{.id = PFUZE100_SW1B, .init_data = &sw1b_init},
@@ -386,6 +441,8 @@ static struct pfuze_platform_data pfuze100_plat = {
.flags = PFUZE_USE_REGULATOR,
.num_regulators = ARRAY_SIZE(mx6q_sabreauto_pfuze100_regulators),
.regulators = mx6q_sabreauto_pfuze100_regulators,
+ .pfuze_init = pfuze100_init,
+
};
static struct i2c_board_info __initdata pfuze100_i2c_device = {