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authorKevin Hilman <khilman@ti.com>2012-03-14 17:26:17 -0700
committerKevin Hilman <khilman@ti.com>2012-07-25 16:06:04 -0700
commit5b4d5bcc68940497722d98d99abee72a0ab1d6f1 (patch)
tree62e03aa78d40e7b47157b03b4d5c6e2e7bb00cd5 /arch/arm/mach-omap2
parentdd3ad97c5621aa853843dd5e6783ca787466158c (diff)
ARM: OMAP4: CPUidle: add synchronization for coupled idle states
With coupled idle states, a failure for any CPU to hit a low power state must be coordinated such that all CPUs abort. On OMAP4, when entering a coupled state, CPU0 has to wait for CPU1 to enter its low power state before it can enter its low power state. This is implemented by letting CPU0 wait for the CPU1 powerdomain to hit off. However, there are conditions where CPU1 might abort/fail and not hit off while CPU0 is waiting for it. For example, a CPU1 wakeup or a failed attempt to hit off due to hardware conditions. To avoid the deadlock where CPU0 would continually wait for CPU1 to hit off-mode, this patch adds a flag to signal when each CPU has come out of its low-power state. CPU0 then checks whether CPU1 has hit off *or* has already completed its attempt to hit off. If the latter, CPU0 must abort its attempt to hit a low-power state so the coupled state enter method can return. In addition, cpuidle_coupled_parallel_barrier() is used to ensure the clearing of the 'done' flag is synchronized on all CPUs. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/cpuidle44xx.c22
1 files changed, 21 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c
index 25655eb69408..eb93e45d3271 100644
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -53,6 +53,9 @@ static struct omap4_idle_statedata omap4_idle_data[] = {
static struct powerdomain *mpu_pd, *cpu_pd[NR_CPUS];
static struct clockdomain *cpu_clkdm[NR_CPUS];
+static atomic_t abort_barrier;
+static bool cpu_done[NR_CPUS];
+
/**
* omap4_enter_idle_coupled_[simple/coupled] - OMAP4 cpuidle entry functions
* @dev: cpuidle device
@@ -90,8 +93,20 @@ static int omap4_enter_idle_coupled(struct cpuidle_device *dev,
* out of coherency and in OFF mode.
*/
if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
- while (pwrdm_read_pwrst(cpu_pd[1]) != PWRDM_POWER_OFF)
+ while (pwrdm_read_pwrst(cpu_pd[1]) != PWRDM_POWER_OFF) {
cpu_relax();
+
+ /*
+ * CPU1 could have already entered & exited idle
+ * without hitting off because of a wakeup
+ * or a failed attempt to hit off mode. Check for
+ * that here, otherwise we could spin forever
+ * waiting for CPU1 off.
+ */
+ if (cpu_done[1])
+ goto fail;
+
+ }
}
clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu_id);
@@ -116,6 +131,7 @@ static int omap4_enter_idle_coupled(struct cpuidle_device *dev,
}
omap4_enter_lowpower(dev->cpu, cx->cpu_state);
+ cpu_done[dev->cpu] = true;
/* Wakeup CPU1 only if it is not offlined */
if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
@@ -138,6 +154,10 @@ static int omap4_enter_idle_coupled(struct cpuidle_device *dev,
clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu_id);
+fail:
+ cpuidle_coupled_parallel_barrier(dev, &abort_barrier);
+ cpu_done[dev->cpu] = false;
+
local_fiq_enable();
return index;