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authorBen Dooks <ben-linux@fluff.org>2008-04-16 00:12:39 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-04-17 17:04:40 +0100
commitd96a980441a70168a8ead0a0f23c4c63725da5fa (patch)
tree098551e6498fa641caaff62e352d21d7d9383c84 /arch/arm/mach-s3c2410/mach-bast.c
parent1017be88d341c05adc8d790d8092781b7330dafd (diff)
[ARM] 4986/1: S3C24XX: Simtec machines need UCLK as parent to DCLK
All current Simtec designs source the DCLK outputs from the UPLL. This means the DCLK's parent must be set to UPLL so that anything enabling and disabling an UPLL sourced clock does not shutdown the DCLK due to missing open counts. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-s3c2410/mach-bast.c')
-rw-r--r--arch/arm/mach-s3c2410/mach-bast.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index b45fb65889d2..518727d0dfcc 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -592,10 +592,10 @@ static void __init bast_map_io(void)
{
/* initialise the clocks */
- s3c24xx_dclk0.parent = NULL;
+ s3c24xx_dclk0.parent = &clk_upll;
s3c24xx_dclk0.rate = 12*1000*1000;
- s3c24xx_dclk1.parent = NULL;
+ s3c24xx_dclk1.parent = &clk_upll;
s3c24xx_dclk1.rate = 24*1000*1000;
s3c24xx_clkout0.parent = &s3c24xx_dclk0;