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| author | Dan Willemsen <dwillemsen@nvidia.com> | 2013-08-19 21:36:12 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-08-30 19:34:42 -0700 |
| commit | 022d870691ba8289a220f68180be4f53294d4a6d (patch) | |
| tree | 3c8b2b478689312339c3bb99d556324a4eae46b0 /arch/arm/mach-shmobile | |
| parent | b684aaa82c8a7faab7063d62728173130b61605e (diff) | |
Revert "ARM: cpu hotplug: remove majority of cache flushing from platforms"
This reverts commit bca7a5a04933700a8bde4ea5798119607a8b0436.
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Diffstat (limited to 'arch/arm/mach-shmobile')
| -rw-r--r-- | arch/arm/mach-shmobile/smp-sh73a0.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c index 496592b6c763..bf79626ee5a4 100644 --- a/arch/arm/mach-shmobile/smp-sh73a0.c +++ b/arch/arm/mach-shmobile/smp-sh73a0.c @@ -104,6 +104,14 @@ static int sh73a0_cpu_kill(unsigned int cpu) static void sh73a0_cpu_die(unsigned int cpu) { + /* + * The ARM MPcore does not issue a cache coherency request for the L1 + * cache when powering off single CPUs. We must take care of this and + * further caches. + */ + dsb(); + flush_cache_all(); + /* Set power off mode. This takes the CPU out of the MP cluster */ scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF); |