diff options
| author | Alex Frid <afrid@nvidia.com> | 2012-01-31 22:48:34 -0800 |
|---|---|---|
| committer | Rohan Somvanshi <rsomvanshi@nvidia.com> | 2012-02-17 07:14:44 -0800 |
| commit | 676518dbd35c737a59205e9611a92e32146d461b (patch) | |
| tree | 9f762e0f90bdd1372713f62900e9a91a1435e44e /arch/arm/mach-tegra/Kconfig | |
| parent | 39af9f4c2c3cf0d9b8026986db5d73b9ad3ffe11 (diff) | |
ARM: tegra: power: Add external LP2 wake timers on secondary CPUs
Add an option to use external timer as Tegra3 secondary CPU wake
source from lp2 (power gated) state. This is a follow up to commit
51e6be9ce103fbeb2b73fa2a9d2b6528a6941e81 that disabled wake from
external timer, since its interrupt is registered too late - after
secondary CPU is brought on-line, and already had a chance to enter
lp2. With this commit, secondary CPU is not allowed to enter lp2 in
idle until wake timer is registered (clock-gated lp3 state is entered
instead).
External timer wake up mechanism is enabled on Tegra3 only if option
HAVE_ARM_TWD is not selected. Otherwise, continue to use local CPU
timers as lp2 wake sources.
Change-Id: Ic8c33f55e77174717bfa6525041e1263d3232dd5
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/83546
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/Kconfig')
| -rw-r--r-- | arch/arm/mach-tegra/Kconfig | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index f3d49bfc89b3..0a5d4d930790 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -41,6 +41,7 @@ config ARCH_TEGRA_3x_SOC select ARCH_SUPPORTS_MSI if TEGRA_PCI select PCI_MSI if TEGRA_PCI select ARM_ERRATA_754322 + select TEGRA_LP2_ARM_TWD if HAVE_ARM_TWD help Support for NVIDIA Tegra 3 family of SoCs, based upon the ARM CortexA9MP CPU and the ARM PL310 L2 cache controller @@ -471,6 +472,9 @@ config TEGRA_WDT_RECOVERY help Enables watchdog recovery mechanism to protect against suspend/resume hangs. + +config TEGRA_LP2_ARM_TWD + bool endif config TEGRA_SLOW_CSITE |