diff options
| author | Scott Williams <scwilliams@nvidia.com> | 2011-07-21 16:06:08 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:46:57 -0800 |
| commit | 6031a0cd1a2391a30e30a5edbcaccf5a1868969c (patch) | |
| tree | 46b2c748f1bce772217468b3cbae1295c7d002e2 /arch/arm/mach-tegra/asm_macros.h | |
| parent | 235b7a5f627819f05e538caf5f21220b8450ec73 (diff) | |
ARM: tegra3: power: Add LP2 power mode support for CPU 0
Add support for forced Tegra3 LP2 low power mode on the boot processor
(CPU 0) via the cluster control interface when all others are offline.
Switching to the LP CPU mode is also enabled with this change.
LP2 in idle and LP2 mode on the secondary processors is not yet
supported.
Change-Id: Icb898729f093be5e006c413f701532dd45228687
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Rebase-Id: Rd5d8c2b0addfd6853033670b992ae082e4a0d9c8
Diffstat (limited to 'arch/arm/mach-tegra/asm_macros.h')
| -rw-r--r-- | arch/arm/mach-tegra/asm_macros.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/asm_macros.h b/arch/arm/mach-tegra/asm_macros.h index 24d1449efbae..61a7028a6cc0 100644 --- a/arch/arm/mach-tegra/asm_macros.h +++ b/arch/arm/mach-tegra/asm_macros.h @@ -19,6 +19,16 @@ #ifdef __ASSEMBLY__ +/* waits until the microsecond counter (base) is > rn */ +.macro wait_until, rn, base, tmp + add \rn, \rn, #1 +1002: ldr \tmp, [\base] + sub \tmp, \tmp, \rn + ands \tmp, \tmp, #0x80000000 + dmb + bne 1002b +.endm + /* returns the offset of the flow controller halt register for a cpu */ .macro cpu_to_halt_reg rd, rcpu cmp \rcpu, #0 |