diff options
| author | Vinayak Pane <vpane@nvidia.com> | 2012-04-27 15:01:05 -0700 |
|---|---|---|
| committer | Simone Willett <swillett@nvidia.com> | 2012-05-21 11:41:37 -0700 |
| commit | 9874f9572f416e190befce95e0c53df4e0a62645 (patch) | |
| tree | 089601671745f5a5155f0b901e92d46f4dc04532 /arch/arm/mach-tegra/baseband-xmm-power.c | |
| parent | 611caa58525e80f46eaf6990b68a7aa82f4f3dfa (diff) | |
arm: tegra: xmm: simultaneous L3 to L0 wakeup
In AP initiated L3->L0 wakeup xmm power state is set BBXMM_PS_L3TOL0
but if CP is also trying to wakeup then ipc_ap_wake_irq with falling
edge treats it incorrectly as CP wakeup pending - new race condition.
Adding a check to fix this scenario for both L3 and L3TOL0 states.
Bug 966077
Change-Id: I3af3538b48745588f17e4c13a3e23e4033f21821
Signed-off-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-on: http://git-master/r/102698
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Steve Lin <stlin@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/baseband-xmm-power.c')
| -rw-r--r-- | arch/arm/mach-tegra/baseband-xmm-power.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/baseband-xmm-power.c b/arch/arm/mach-tegra/baseband-xmm-power.c index 32d46d414cb5..75ad8d28d475 100644 --- a/arch/arm/mach-tegra/baseband-xmm-power.c +++ b/arch/arm/mach-tegra/baseband-xmm-power.c @@ -516,7 +516,8 @@ irqreturn_t xmm_power_ipc_ap_wake_irq(int irq, void *dev_id) pr_info("Set wakeup_pending = 1 in system_" " suspending!!!\n"); } else { - if (baseband_xmm_powerstate == BBXMM_PS_L3) { + if ((baseband_xmm_powerstate == BBXMM_PS_L3) || + (baseband_xmm_powerstate == BBXMM_PS_L3TOL0)) { spin_unlock(&xmm_lock); pr_info(" CP L3 -> L0\n"); } else if (baseband_xmm_powerstate == BBXMM_PS_L2) { |