summaryrefslogtreecommitdiff
path: root/arch/arm/mach-tegra/board-apalis_t30-panel.c
diff options
context:
space:
mode:
authorStefan Agner <stefan.agner@toradex.com>2014-01-22 18:23:26 +0100
committerStefan Agner <stefan.agner@toradex.com>2014-01-22 18:23:26 +0100
commit009e6229134cffa05aafb780362b7c5480ec7a16 (patch)
treefcae485c5b2c0be9d6b80cf320fe6fe763c7aa40 /arch/arm/mach-tegra/board-apalis_t30-panel.c
parentf939885e6f77ac92bad278487ccf651f2256a7b0 (diff)
colibri_t20/colibri_t30/apalis_t30: remove TEGRA_FB_VGA defines
Remove TEGRA_FB_VGA defines and use VGA as default. Since initial mode is now configureable through kernel cmd line parameter, we don't need those compile time helpers.
Diffstat (limited to 'arch/arm/mach-tegra/board-apalis_t30-panel.c')
-rw-r--r--arch/arm/mach-tegra/board-apalis_t30-panel.c19
1 files changed, 0 insertions, 19 deletions
diff --git a/arch/arm/mach-tegra/board-apalis_t30-panel.c b/arch/arm/mach-tegra/board-apalis_t30-panel.c
index 289ed2a5a6f6..1be339dce6ef 100644
--- a/arch/arm/mach-tegra/board-apalis_t30-panel.c
+++ b/arch/arm/mach-tegra/board-apalis_t30-panel.c
@@ -215,22 +215,11 @@ static struct resource apalis_t30_disp2_resources[] = {
#ifdef CONFIG_TEGRA_DC
static struct tegra_fb_data apalis_t30_fb_data = {
.win = 0,
-#ifdef TEGRA_FB_VGA
- .xres = 640,
- .yres = 480,
-#else /* TEGRA_FB_VGA */
- .xres = 1920,
- .yres = 1080,
-#endif /* TEGRA_FB_VGA */
- .bits_per_pixel = 16,
.flags = TEGRA_FB_FLIP_ON_PROBE,
};
static struct tegra_fb_data apalis_t30_hdmi_fb_data = {
.win = 0,
- .xres = 640,
- .yres = 480,
- .bits_per_pixel = 16,
.flags = TEGRA_FB_FLIP_ON_PROBE,
};
@@ -259,11 +248,7 @@ static struct tegra_dc_out apalis_t30_disp1_out = {
.depth = 24,
.dither = TEGRA_DC_ORDERED_DITHER,
-#ifdef TEGRA_FB_VGA
.default_mode = "640x480-16@60",
-#else /* TEGRA_FB_VGA */
- .default_mode = "1920x1080-16@60",
-#endif /* TEGRA_FB_VGA */
.out_pins = apalis_t30_dc_out_pins,
.n_out_pins = ARRAY_SIZE(apalis_t30_dc_out_pins),
@@ -282,11 +267,7 @@ static struct tegra_dc_out apalis_t30_disp2_out = {
.max_pixclock = KHZ2PICOS(148500),
-#ifdef TEGRA_FB_VGA
.default_mode = "640x480-16@60",
-#else /* TEGRA_FB_VGA */
- .default_mode = "1920x1080-16@60",
-#endif /* TEGRA_FB_VGA */
.align = TEGRA_DC_ALIGN_MSB,
.order = TEGRA_DC_ORDER_RED_BLUE,