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authorMohan T <mohant@nvidia.com>2014-04-17 12:46:23 +0530
committerSeema Khowala <seemaj@nvidia.com>2014-04-23 14:07:23 -0700
commit233605e971e5c327f6ca922a3d447b900e84fb89 (patch)
tree677070f691fc05625d94f9fa4af2d6c2a18f166c /arch/arm/mach-tegra/board-ardbeg-sdhci.c
parent7de8b76f06c0e70615f99104ad2f2430219060c4 (diff)
ARM: tegra: sdhci: Set drive type A to E1780 and E1784
T124 ERS platforms has more trace length due to interposer board for WiFi chip. So set drive strength type A. Bug 1458921 Change-Id: Iaf4b5539ce4b8a088b91b8c8b8d99d8a64408e81 Signed-off-by: Mohan T <mohant@nvidia.com> Reviewed-on: http://git-master/r/395844 GVS: Gerrit_Virtual_Submit Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/board-ardbeg-sdhci.c')
-rw-r--r--arch/arm/mach-tegra/board-ardbeg-sdhci.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/board-ardbeg-sdhci.c b/arch/arm/mach-tegra/board-ardbeg-sdhci.c
index c8449406a925..9e696786de1a 100644
--- a/arch/arm/mach-tegra/board-ardbeg-sdhci.c
+++ b/arch/arm/mach-tegra/board-ardbeg-sdhci.c
@@ -463,6 +463,16 @@ int __init ardbeg_sdhci_init(void)
tegra_get_board_info(&board_info);
if (board_info.board_id == BOARD_E1780)
tegra_sdhci_platform_data2.max_clk_limit = 204000000;
+
+ /* E1780 and E1784 are using interposer E1816, Due to this the
+ * SDIO trace length got increased. So hard coding the drive
+ * strength to type A for these boards to support 204 Mhz */
+ if ((board_info.board_id == BOARD_E1780) ||
+ (board_info.board_id == BOARD_E1784)) {
+ tegra_sdhci_platform_data0.default_drv_type =
+ MMC_SET_DRIVER_TYPE_A;
+ }
+
tegra_sdhci_platform_data0.max_clk_limit = 136000000;
if (board_info.board_id == BOARD_E1781)