diff options
author | Hyungwoo Yang <hyungwooy@nvidia.com> | 2011-09-06 19:03:10 -0700 |
---|---|---|
committer | Varun Colbert <vcolbert@nvidia.com> | 2011-09-08 17:19:47 -0700 |
commit | b83e795747fa860b5b7fb66b2067ebe4f15bcfd0 (patch) | |
tree | 49d2cf606b7927475f5f2c61945e514a95eac372 /arch/arm/mach-tegra/board-cardhu-pinmux.c | |
parent | 642eac7b9c8994b42d32a0c3794d0bb2194e62c0 (diff) |
video: tegra: support display board PM313
This change supports PM313 with 19X12 panel.
The change uses PM313 in "Single input to Dual output" mode
Bug ID : 822980
Change-Id: Ibba1f116ea6e4b2626e451c66a39caca79055d0e
Reviewed-on: http://git-master/r/50215
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/board-cardhu-pinmux.c')
-rw-r--r-- | arch/arm/mach-tegra/board-cardhu-pinmux.c | 62 |
1 files changed, 52 insertions, 10 deletions
diff --git a/arch/arm/mach-tegra/board-cardhu-pinmux.c b/arch/arm/mach-tegra/board-cardhu-pinmux.c index d5530950e34a..81fa93d24f19 100644 --- a/arch/arm/mach-tegra/board-cardhu-pinmux.c +++ b/arch/arm/mach-tegra/board-cardhu-pinmux.c @@ -213,9 +213,7 @@ static __initdata struct tegra_pingroup_config cardhu_pinmux_common[] = { DEFAULT_PINMUX(LCD_SDIN, DISPLAYA, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(LCD_SDOUT, DISPLAYA, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(LCD_WR_N, DISPLAYA, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(LCD_CS0_N, DISPLAYA, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(LCD_DC0, DISPLAYA, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(LCD_SCK, DISPLAYA, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(LCD_PWR0, DISPLAYA, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(LCD_PCLK, DISPLAYA, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(LCD_DE, DISPLAYA, NORMAL, NORMAL, INPUT), @@ -245,8 +243,6 @@ static __initdata struct tegra_pingroup_config cardhu_pinmux_common[] = { DEFAULT_PINMUX(LCD_D21, DISPLAYA, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(LCD_D22, DISPLAYA, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(LCD_D23, DISPLAYA, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(LCD_CS1_N, DISPLAYA, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(LCD_M1, DISPLAYA, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(LCD_DC1, DISPLAYA, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(CRT_HSYNC, CRT, NORMAL, NORMAL, OUTPUT), DEFAULT_PINMUX(CRT_VSYNC, CRT, NORMAL, NORMAL, OUTPUT), @@ -318,9 +314,7 @@ static __initdata struct tegra_pingroup_config cardhu_pinmux_common[] = { DEFAULT_PINMUX(GMI_OE_N, NAND, NORMAL, NORMAL, OUTPUT), DEFAULT_PINMUX(GMI_DQS, NAND, NORMAL, NORMAL, INPUT), #else - DEFAULT_PINMUX(GMI_CS2_N, RSVD1, PULL_UP, NORMAL, INPUT), /* EN_VDD_BL1 */ DEFAULT_PINMUX(GMI_AD8, PWM0, NORMAL, NORMAL, OUTPUT), /* LCD1_BL_PWM */ - DEFAULT_PINMUX(GMI_AD10, NAND, NORMAL, NORMAL, OUTPUT), /* LCD1_BL_EN */ #endif DEFAULT_PINMUX(GMI_A16, SPI4, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(GMI_A17, SPI4, NORMAL, NORMAL, INPUT), @@ -424,12 +418,20 @@ static __initdata struct tegra_pingroup_config cardhu_pinmux_common[] = { static __initdata struct tegra_pingroup_config cardhu_pinmux_e118x[] = { /* Power rails GPIO */ DEFAULT_PINMUX(SPI2_SCK, SPI2, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(GMI_CS2_N, NAND, NORMAL, NORMAL, OUTPUT), DEFAULT_PINMUX(GMI_RST_N, RSVD3, PULL_UP, TRISTATE, INPUT), DEFAULT_PINMUX(GMI_AD15, NAND, PULL_UP, TRISTATE, INPUT), }; static __initdata struct tegra_pingroup_config cardhu_pinmux_cardhu[] = { + DEFAULT_PINMUX(LCD_CS0_N, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_SCK, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_CS1_N, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_M1, DISPLAYA, NORMAL, NORMAL, INPUT), + + DEFAULT_PINMUX(GMI_CS2_N, RSVD1, PULL_UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD8, PWM0, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD10, NAND, NORMAL, NORMAL, OUTPUT), + /* Power rails GPIO */ DEFAULT_PINMUX(GMI_CS2_N, NAND, NORMAL, NORMAL, OUTPUT), DEFAULT_PINMUX(GMI_RST_N, RSVD3, PULL_UP, TRISTATE, INPUT), @@ -444,6 +446,15 @@ static __initdata struct tegra_pingroup_config cardhu_pinmux_cardhu[] = { }; static __initdata struct tegra_pingroup_config cardhu_pinmux_cardhu_a03[] = { + DEFAULT_PINMUX(LCD_CS0_N, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_SCK, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_CS1_N, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_M1, DISPLAYA, NORMAL, NORMAL, INPUT), + + DEFAULT_PINMUX(GMI_CS2_N, RSVD1, PULL_UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD8, PWM0, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD10, NAND, NORMAL, NORMAL, OUTPUT), + /* Power rails GPIO */ DEFAULT_PINMUX(PEX_L0_PRSNT_N, PCIE, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(PEX_L0_CLKREQ_N, PCIE, NORMAL, NORMAL, INPUT), @@ -456,6 +467,15 @@ static __initdata struct tegra_pingroup_config cardhu_pinmux_e1291_a04[] = { }; static __initdata struct tegra_pingroup_config cardhu_pinmux_e1198[] = { + DEFAULT_PINMUX(LCD_CS0_N, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_SCK, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_CS1_N, DISPLAYA, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(LCD_M1, DISPLAYA, NORMAL, NORMAL, INPUT), + + DEFAULT_PINMUX(GMI_CS2_N, RSVD1, PULL_UP, NORMAL, INPUT), + DEFAULT_PINMUX(GMI_AD8, PWM0, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GMI_AD10, NAND, NORMAL, NORMAL, OUTPUT), + /* SPI2 */ DEFAULT_PINMUX(SPI2_SCK, SPI2, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(SPI2_MOSI, SPI2, PULL_UP, NORMAL, INPUT), @@ -603,6 +623,19 @@ struct pin_info_low_power_mode vddio_gmi_pins_pm269[] = { PIN_GPIO_LPM("GMI_A19", TEGRA_GPIO_PK7, 0, 0), }; +struct pin_info_low_power_mode vddio_gmi_pins_pm269_pm313[] = { + PIN_GPIO_LPM("GMI_CS3_N", TEGRA_GPIO_PK4, 0, 0), + PIN_GPIO_LPM("GMI_CS4_N", TEGRA_GPIO_PK2, 1, 0), + PIN_GPIO_LPM("GMI_CS7", TEGRA_GPIO_PI6, 1, 0), + PIN_GPIO_LPM("GMI_CS0", TEGRA_GPIO_PJ0, 1, 0), + PIN_GPIO_LPM("GMI_CS1", TEGRA_GPIO_PJ2, 1, 0), + PIN_GPIO_LPM("GMI_WP_N", TEGRA_GPIO_PC7, 1, 0), + PIN_GPIO_LPM("GMI_A16", TEGRA_GPIO_PJ7, 0, 0), + PIN_GPIO_LPM("GMI_A17", TEGRA_GPIO_PB0, 0, 0), + PIN_GPIO_LPM("GMI_A18", TEGRA_GPIO_PB1, 1, 0), + PIN_GPIO_LPM("GMI_A19", TEGRA_GPIO_PK7, 0, 0), +}; + static void set_unused_pin_gpio(struct pin_info_low_power_mode *lpm_pin_info, int list_count) { @@ -641,8 +674,10 @@ static void set_unused_pin_gpio(struct pin_info_low_power_mode *lpm_pin_info, int __init cardhu_pins_state_init(void) { struct board_info board_info; + struct board_info display_board_info; tegra_get_board_info(&board_info); + tegra_get_display_board_info(&display_board_info); if ((board_info.board_id == BOARD_E1291) || (board_info.board_id == BOARD_E1198)) set_unused_pin_gpio(&pin_lpm_cardhu_common[0], @@ -650,8 +685,15 @@ int __init cardhu_pins_state_init(void) if ((board_info.board_id == BOARD_PM269) || (board_info.board_id == BOARD_PM305) || - (board_info.board_id == BOARD_PM311)) - set_unused_pin_gpio(&vddio_gmi_pins_pm269[0], - ARRAY_SIZE(vddio_gmi_pins_pm269)); + (board_info.board_id == BOARD_PM311)) { + if (display_board_info.board_id == BOARD_DISPLAY_PM313) { + set_unused_pin_gpio(&vddio_gmi_pins_pm269_pm313[0], + ARRAY_SIZE(vddio_gmi_pins_pm269_pm313)); + } else { + set_unused_pin_gpio(&vddio_gmi_pins_pm269[0], + ARRAY_SIZE(vddio_gmi_pins_pm269)); + } + } + return 0; } |