diff options
| author | Alex Frid <afrid@nvidia.com> | 2011-04-27 20:42:51 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:45:51 -0800 |
| commit | 6a55b8e2ae15dc262f824af388aa12052c002adc (patch) | |
| tree | 3330892eb5d78cd2cbaec7011a5f1240b9b8cd65 /arch/arm/mach-tegra/board-cardhu.c | |
| parent | e2f639ed303af1469e2cc41cf2a534bc5441da57 (diff) | |
ARM: tegra: clock: Init Tegra3 sclk frequency to 108MHz
Set Tegra3 default system clock frequency to 108MHz. Previous setting
216MHz was kept until the 1st sclk user is enabled, and then, when it
is disabled go down to 108MHz, anyway. On the other hand, system power
immediately after boot was affected by unnecessary high sclk frequency
while OS is idle. This change also enables dynamic switching between
sclk parents PLLP_OUT4 and PLLM_OUT1.
Original-Change-Id: I00b12f3aef5c5fc8226d6c27470f4610e9e43ad8
Reviewed-on: http://git-master/r/29761
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Rebase-Id: R78614e2149eaf497fe1c9a8dbf0d4e67fb0ecf06
Diffstat (limited to 'arch/arm/mach-tegra/board-cardhu.c')
| -rw-r--r-- | arch/arm/mach-tegra/board-cardhu.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/board-cardhu.c b/arch/arm/mach-tegra/board-cardhu.c index 1480af74c3c9..eec4ec17030e 100644 --- a/arch/arm/mach-tegra/board-cardhu.c +++ b/arch/arm/mach-tegra/board-cardhu.c @@ -202,7 +202,6 @@ static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = { { "pll_m", NULL, 0, true}, { "hda", "pll_p", 108000000, false}, { "hda2codec_2x","pll_p", 48000000, false}, - { "pll_p_out4", "pll_p", 216000000, true }, { "pwm", "clk_32k", 32768, false}, { "blink", "clk_32k", 32768, true}, { "pll_a", NULL, 56448000, true}, |