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authorNitin Pai <npai@nvidia.com>2012-07-10 19:01:34 +0530
committerSimone Willett <swillett@nvidia.com>2012-07-30 21:21:54 -0700
commitf2519724748766b0daef5d380a3a5414b77a437b (patch)
tree689de18e655651997b7172ca169efdd57ec7bdd5 /arch/arm/mach-tegra/board-p1852-pinmux.c
parenta48a860872760257ffbc4787327de2d63478aaf0 (diff)
arm: tegra: p1852: Fixes for I2S master mode
Change the Drive strength of DAP1 for I2S to operate in both master and slave mode. Changed the Pull Up/Down mechanism for I2S4 to operate in master/slave mode. Bug 1009249 Signed-off-by: Nitin Pai <npai@nvidia.com> Reviewed-on: http://git-master/r/114587 (cherry picked from commit 29ec5dfb81b823880f393bece5daf5396ef77629) Change-Id: I24a252370b993150a553c9f81fb44e6d8f86589a Reviewed-on: http://git-master/r/118251 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/board-p1852-pinmux.c')
-rw-r--r--arch/arm/mach-tegra/board-p1852-pinmux.c24
1 files changed, 14 insertions, 10 deletions
diff --git a/arch/arm/mach-tegra/board-p1852-pinmux.c b/arch/arm/mach-tegra/board-p1852-pinmux.c
index 21f310b0ef16..bb28e278dc89 100644
--- a/arch/arm/mach-tegra/board-p1852-pinmux.c
+++ b/arch/arm/mach-tegra/board-p1852-pinmux.c
@@ -119,13 +119,8 @@ static __initdata struct tegra_drive_pingroup_config p1852_drive_pinmux[] = {
SET_DRIVE(GMH, DISABLE, ENABLE, DIV_1, 0, 12, SLOWEST, SLOWEST),
/* I2S/TDM */
-#ifdef CONFIG_TEGRA_MODS
SET_DRIVE(DAP1, ENABLE, ENABLE, DIV_1, 20, 20, SLOWEST, SLOWEST),
SET_DRIVE(DAP3, ENABLE, ENABLE, DIV_1, 20, 20, SLOWEST, SLOWEST),
-#else
- SET_DRIVE(DAP1, ENABLE, ENABLE, DIV_1, 3, 3, SLOWEST, SLOWEST),
- SET_DRIVE(DAP3, ENABLE, ENABLE, DIV_1, 3, 3, SLOWEST, SLOWEST),
-#endif
/* SPI */
SET_DRIVE(UAD, DISABLE, ENABLE, DIV_1, 4, 1, SLOWEST, SLOWEST),
@@ -184,6 +179,9 @@ static __initdata struct tegra_drive_pingroup_config p1852_drive_pinmux[] = {
}
+static __initdata struct tegra_pingroup_config p1852_pinmux_i2s4_master[] = {
+ DEFAULT_PINMUX(SDMMC4_CLK, NAND, PULL_UP, NORMAL, INPUT),
+};
static __initdata struct tegra_pingroup_config p1852_pinmux_common[] = {
/* SDMMC1 pinmux */
@@ -291,10 +289,10 @@ static __initdata struct tegra_pingroup_config p1852_pinmux_common[] = {
DEFAULT_PINMUX(DAP3_SCLK, I2S2, NORMAL, NORMAL, INPUT),
/* DAP3 */
- LVPAD_PINMUX(SDMMC4_DAT4, I2S4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LVPAD_PINMUX(SDMMC4_DAT5, I2S4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LVPAD_PINMUX(SDMMC4_DAT6, I2S4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LVPAD_PINMUX(SDMMC4_DAT7, I2S4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+ DEFAULT_PINMUX(SDMMC4_DAT4, I2S4, NORMAL, NORMAL, INPUT),
+ DEFAULT_PINMUX(SDMMC4_DAT5, I2S4, NORMAL, NORMAL, INPUT),
+ DEFAULT_PINMUX(SDMMC4_DAT6, I2S4, NORMAL, NORMAL, INPUT),
+ DEFAULT_PINMUX(SDMMC4_DAT7, I2S4, NORMAL, NORMAL, INPUT),
/* NOR pinmux */
DEFAULT_PINMUX(GMI_AD0, GMI, NORMAL, NORMAL, INPUT),
@@ -427,7 +425,7 @@ static __initdata struct tegra_pingroup_config p1852_pinmux_common[] = {
DEFAULT_PINMUX(GPIO_PV2, RSVD1, NORMAL, NORMAL, INPUT),
DEFAULT_PINMUX(GPIO_PV3, RSVD1, NORMAL, NORMAL, INPUT),
DEFAULT_PINMUX(SDMMC3_DAT7, SDMMC3, NORMAL, NORMAL, INPUT),
- LVPAD_PINMUX(SDMMC4_CLK, NAND, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+ DEFAULT_PINMUX(SDMMC4_CLK, NAND, NORMAL, NORMAL, INPUT),
DEFAULT_PINMUX(SDMMC3_CMD, SDMMC3, NORMAL, NORMAL, INPUT),
DEFAULT_PINMUX(SDMMC3_DAT3, RSVD0, NORMAL, NORMAL, INPUT),
DEFAULT_PINMUX(VI_D1, RSVD1, NORMAL, NORMAL, INPUT),
@@ -445,6 +443,12 @@ int __init p1852_pinmux_init(void)
return 0;
}
+int p1852_pinmux_set_i2s4_master(void)
+{
+ tegra_pinmux_config_table(p1852_pinmux_i2s4_master,
+ ARRAY_SIZE(p1852_pinmux_i2s4_master));
+ return 0;
+}
#define GPIO_INIT_PIN_MODE(_gpio, _is_input, _value) \
{ \
.gpio_nr = _gpio, \