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authorDongfang Shi <dshi@nvidia.com>2012-05-03 16:40:49 -0700
committerSimone Willett <swillett@nvidia.com>2012-07-16 20:13:21 -0700
commit9aed57c5b382154e89bb08ca160a413162e0e17d (patch)
tree4685974c8428b2047a7f706e2b576339f314171f /arch/arm/mach-tegra/board-p1852.h
parent7013f2d625dbf31479b3a67de25503a01ecd02c2 (diff)
ARM: tegra: p1852: Dual-display support for all SKUs
Ported Peter's original change 86413 to main. board-p1852-panel.c: Add support for primary and secondary LVDS displays, and secondary HDMI display. board-p1852-pinmux.c: Add configuration for HDMI and LVDS board-p1852.c: board-p1852.h: Support for determining which p1852 sku is in use hdmi.c:If no edid retrieved, but there's a hardwired mode, enable it (used to support HDMI->LVDS output on p1852 sku 2) devices.c:added secondary display data. Bug 977859 Bug 994011 Change-Id: Ide8fb6bf7dd873b1d50269fb98d7c1687e4d9073 Signed-off-by: Dongfang Shi <dshi@nvidia.com> Reviewed-on: http://git-master/r/100438 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/board-p1852.h')
-rw-r--r--arch/arm/mach-tegra/board-p1852.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/board-p1852.h b/arch/arm/mach-tegra/board-p1852.h
index 1ac0968f9518..529bd3840e63 100644
--- a/arch/arm/mach-tegra/board-p1852.h
+++ b/arch/arm/mach-tegra/board-p1852.h
@@ -90,16 +90,27 @@
#define AC_PRESENT_INT (TPS6591X_INT_GPIO4 + TPS6591X_IRQ_BASE)
+/* List of P1852 skus - replicated from core/include/nvmachtypes.h */
+#define TEGRA_P1852_SKU2_A00 0x020000UL
+#define TEGRA_P1852_SKU2_B00 0x020200UL
+#define TEGRA_P1852_SKU5_A00 0x050000UL
+#define TEGRA_P1852_SKU5_B00 0x050200UL
+#define TEGRA_P1852_SKU8_A00 0x080000UL
+#define TEGRA_P1852_SKU8_B00 0x080200UL
+
int p1852_sdhci_init(void);
int p1852_pinmux_init(void);
int p1852_panel_init(void);
int p1852_gpio_init(void);
int p1852_pins_state_init(void);
+int p1852_get_skuid(void);
+
#ifdef CONFIG_TOUCHSCREEN_ATMEL_MXT
#define TOUCH_GPIO_IRQ_ATMEL_T9 TEGRA_GPIO_PEE1
#define TOUCH_GPIO_RST_ATMEL_T9 TEGRA_GPIO_PW2
#define TOUCH_BUS_ATMEL_T9 0
#endif
+
#endif