diff options
| author | Nitin Kumbhar <nkumbhar@nvidia.com> | 2011-03-22 11:57:35 +0530 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:46:15 -0800 |
| commit | 6cbb0a51234890238d29dda2c7d51c251f76ecae (patch) | |
| tree | 1a4dd3abbaee8f5c423ca9c34f944cd63d8e64c7 /arch/arm/mach-tegra/board-ventana-pinmux.c | |
| parent | d2bcc33f801c84062314a6c862d5cbe38388bd9f (diff) | |
ARM: tegra: pinmux: correct i2c drive pin groups
The drive pin groups for i2c are DBG(GEN1_I2C), VI2(CAM_I2C),
AT1(GEN2_I2C) and AO1(PWR_I2C). As there are no entries in
tegra_soc_drive_pingroups table for DTF, I2CP and RM, pg_readl()
and pg_writel() use '0' as reg offset while configuring i2c drive
pin groups.
Original-Change-Id: Ide6aa68ad0d7247791169f1b3e6c84b324c1dfcf
Reviewed-on: http://git-master/r/23831
Tested-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Rebase-Id: R48299d59c3865ff80431d04a51df89f03669ff93
Diffstat (limited to 'arch/arm/mach-tegra/board-ventana-pinmux.c')
| -rw-r--r-- | arch/arm/mach-tegra/board-ventana-pinmux.c | 13 |
1 files changed, 5 insertions, 8 deletions
diff --git a/arch/arm/mach-tegra/board-ventana-pinmux.c b/arch/arm/mach-tegra/board-ventana-pinmux.c index de702536c78f..8be792ad5afa 100644 --- a/arch/arm/mach-tegra/board-ventana-pinmux.c +++ b/arch/arm/mach-tegra/board-ventana-pinmux.c @@ -43,17 +43,14 @@ } static __initdata struct tegra_drive_pingroup_config ventana_drive_pinmux[] = { - DEFAULT_DRIVE(AO1), - DEFAULT_DRIVE(AT1), - DEFAULT_DRIVE(DBG), + DEFAULT_DRIVE(DDC), DEFAULT_DRIVE(VI1), - DEFAULT_DRIVE(VI2), DEFAULT_DRIVE(SDIO1), - SET_DRIVE(DDC, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), - SET_DRIVE(DTF, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), - SET_DRIVE(I2CP, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), - SET_DRIVE(RM, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), + SET_DRIVE(DBG, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), + SET_DRIVE(VI2, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), + SET_DRIVE(AT1, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), + SET_DRIVE(AO1, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), }; static __initdata struct tegra_pingroup_config ventana_pinmux[] = { |