summaryrefslogtreecommitdiff
path: root/arch/arm/mach-tegra/board-whistler-memory.c
diff options
context:
space:
mode:
authorPrashant Gaikwad <pgaikwad@nvidia.com>2012-01-05 12:08:14 +0530
committerSimone Willett <swillett@nvidia.com>2012-02-17 15:55:29 -0800
commitd7b0932162f0940c6579222fbace1d75fd53acb4 (patch)
treef359be40d25736e732daf25516e923b8f08bfe77 /arch/arm/mach-tegra/board-whistler-memory.c
parent59a48a52ef1b0222728beebfcc05a12cf5fb872d (diff)
ARM: tegra: whistler: nvidia memory table updates to prevent corruption
To avoid memory corruption when device is operating at full temperature QUSE_EXTRA should always be set to 0 for frequencies 150MHz and less. As extra protection change FBIO_CFG5 to remove the region where there is TriState on the DQS signals thus preventing false DQS pulses (and false reads). Bug 851461 Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> (cherry picked from commit b4eed65c4d0c493384c8cd10d2e455a9ea0d8ea5) Change-Id: I9aa60fca6fa09e538a1f2643cfe86247945ea000 Reviewed-on: http://git-master/r/84318 Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com> Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-by: Edward Ahn <eahn@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/board-whistler-memory.c')
-rw-r--r--arch/arm/mach-tegra/board-whistler-memory.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mach-tegra/board-whistler-memory.c b/arch/arm/mach-tegra/board-whistler-memory.c
index e54be7d97f7a..8dd4c8fe2251 100644
--- a/arch/arm/mach-tegra/board-whistler-memory.c
+++ b/arch/arm/mach-tegra/board-whistler-memory.c
@@ -60,11 +60,11 @@ static const struct tegra_emc_table whistler_emc_tables_elpida_300Mhz[] = {
0x00000006, /* TCLKSTABLE */
0x00000002, /* TCLKSTOP */
0x00000068, /* TREFBW */
- 0x00000003, /* QUSE_EXTRA */
+ 0x00000000, /* QUSE_EXTRA */
0x00000003, /* FBIO_CFG6 */
0x00000000, /* ODT_WRITE */
0x00000000, /* ODT_READ */
- 0x00000082, /* FBIO_CFG5 */
+ 0x00000282, /* FBIO_CFG5 */
0xa06a04ae, /* CFG_DIG_DLL */
0x0001f000, /* DLL_XFORM_DQS */
0x00000000, /* DLL_XFORM_QUSE */
@@ -111,11 +111,11 @@ static const struct tegra_emc_table whistler_emc_tables_elpida_300Mhz[] = {
0x00000006, /* TCLKSTABLE */
0x00000002, /* TCLKSTOP */
0x000000d0, /* TREFBW */
- 0x00000004, /* QUSE_EXTRA */
+ 0x00000000, /* QUSE_EXTRA */
0x00000000, /* FBIO_CFG6 */
0x00000000, /* ODT_WRITE */
0x00000000, /* ODT_READ */
- 0x00000082, /* FBIO_CFG5 */
+ 0x00000282, /* FBIO_CFG5 */
0xa06a04ae, /* CFG_DIG_DLL */
0x0001f000, /* DLL_XFORM_DQS */
0x00000000, /* DLL_XFORM_QUSE */
@@ -162,11 +162,11 @@ static const struct tegra_emc_table whistler_emc_tables_elpida_300Mhz[] = {
0x00000006, /* TCLKSTABLE */
0x00000002, /* TCLKSTOP */
0x00000138, /* TREFBW */
- 0x00000004, /* QUSE_EXTRA */
+ 0x00000000, /* QUSE_EXTRA */
0x00000000, /* FBIO_CFG6 */
0x00000000, /* ODT_WRITE */
0x00000000, /* ODT_READ */
- 0x00000082, /* FBIO_CFG5 */
+ 0x00000282, /* FBIO_CFG5 */
0xa06a04ae, /* CFG_DIG_DLL */
0x0001f000, /* DLL_XFORM_DQS */
0x00000000, /* DLL_XFORM_QUSE */
@@ -217,7 +217,7 @@ static const struct tegra_emc_table whistler_emc_tables_elpida_300Mhz[] = {
0x00000001, /* FBIO_CFG6 */
0x00000000, /* ODT_WRITE */
0x00000000, /* ODT_READ */
- 0x00000082, /* FBIO_CFG5 */
+ 0x00000282, /* FBIO_CFG5 */
0xA04C04AE, /* CFG_DIG_DLL */
0x007FC010, /* DLL_XFORM_DQS */
0x00000000, /* DLL_XFORM_QUSE */