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authorDan Willemsen <dwillemsen@nvidia.com>2011-06-14 15:15:46 -0700
committerDan Willemsen <dwillemsen@nvidia.com>2011-11-30 21:46:45 -0800
commit8d351aa5478de533114e614f2607bc85ed23df91 (patch)
treed61b25357e0edfdff52eb5bf12e63a0cc279a553 /arch/arm/mach-tegra/clock.c
parent653c9bdad0200686507d6e5910c829fe2a3e934d (diff)
ARM: tegra: clock: Don't fail clk_enable when max_rate has been lowered
Rebase-Id: Rea679b3ebef177d19f96bfc298d1f5da8588d6ad
Diffstat (limited to 'arch/arm/mach-tegra/clock.c')
-rw-r--r--arch/arm/mach-tegra/clock.c12
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c
index cbe34d7a5c3b..7ed1823fe089 100644
--- a/arch/arm/mach-tegra/clock.c
+++ b/arch/arm/mach-tegra/clock.c
@@ -236,9 +236,16 @@ void clk_init(struct clk *c)
static int clk_enable_locked(struct clk *c)
{
int ret = 0;
+ int rate = clk_get_rate_locked(c);
+ bool set_rate = false;
+
+ if (rate > c->max_rate) {
+ rate = c->max_rate;
+ set_rate = true;
+ }
if (clk_is_auto_dvfs(c)) {
- ret = tegra_dvfs_set_rate(c, clk_get_rate_locked(c));
+ ret = tegra_dvfs_set_rate(c, rate);
if (ret)
return ret;
}
@@ -250,6 +257,9 @@ static int clk_enable_locked(struct clk *c)
return ret;
}
+ if (set_rate)
+ clk_set_rate_locked(c, rate);
+
if (c->ops && c->ops->enable) {
ret = c->ops->enable(c);
trace_clock_enable(c->name, 1, 0);