diff options
| author | Karan Jhavar <kjhavar@nvidia.com> | 2011-05-16 17:00:43 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:47:21 -0800 |
| commit | 939622838082223cf57304a1252808641da5c5a8 (patch) | |
| tree | 8f27981a6f35fc631a7f19740f852cf65b45143e /arch/arm/mach-tegra/clock.c | |
| parent | 8ffe7f45623875526685d9d4ef5096dcee7a5e38 (diff) | |
ARM: tegra: power: Refactored kernel powergate code
This change provides a centralized location for powergating modules.
It would take care of switching on/off clocks while un-powergating/
powergating modules respectively.
Bug: 814267
Original-Change-Id: Ic80dc517f634c29085c8e089bdaa32c6fd742710
Reviewed-on: http://git-master/r/31776
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>
Rebase-Id: Rc0aac0edd4e693c15d22d998c882fceeeb85765d
Diffstat (limited to 'arch/arm/mach-tegra/clock.c')
| -rw-r--r-- | arch/arm/mach-tegra/clock.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c index 8ac85e943875..6aac69bc575e 100644 --- a/arch/arm/mach-tegra/clock.c +++ b/arch/arm/mach-tegra/clock.c @@ -638,6 +638,12 @@ void tegra_periph_reset_assert(struct clk *c) } EXPORT_SYMBOL(tegra_periph_reset_assert); +int tegra_is_clk_enabled(struct clk *c) +{ + return c->refcnt; +} +EXPORT_SYMBOL(tegra_is_clk_enabled); + /* dvfs initialization may lower default maximum rate */ void __init tegra_init_max_rate(struct clk *c, unsigned long max_rate) { |