ARM: tegra: Add dvfs rails

The previous version of dvfs handled requirements between two
different voltage rails by using two sets of dvfs tables, one
for each rail.  That method fails for vdd_aon, which must be
within 170 mV of vdd_core.

Instead, have each dvfs clock only set the voltage rail that
it directly depends on, and add a relationship system to the
voltage rails.  When the voltage changes on one rail, it calls
update on all the rails that depend on it.  The dependent rails
compare the new voltage of the original rail to their own
voltage, and update their own voltage as necessary.

Change-Id: I17b30a61c7c0c01e44702ab486238789abd47330
Signed-off-by: Colin Cross <ccross@android.com>

1 files changed, 4 insertions, 37 deletions

diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c
index 34c2c29fa760..124af0f78782 100644
--- a/arch/arm/mach-tegra/clock.c
+++ b/arch/arm/mach-tegra/clock.c
@@ -87,7 +87,7 @@ static inline bool clk_is_auto_dvfs(struct clk *c)
 
 static inline bool clk_is_dvfs(struct clk *c)
 {
-	return c->is_dvfs;
+	return (c->dvfs != NULL);
 }
 
 static inline bool clk_cansleep(struct clk *c)
@@ -217,8 +217,6 @@ void clk_init(struct clk *c)
 {
 	clk_lock_init(c);
 
-	INIT_LIST_HEAD(&c->dvfs);
-
 	if (c->ops && c->ops->init)
 		c->ops->init(c);
 
@@ -511,35 +509,6 @@ void __init tegra_init_clock(void)
 }
 
 /*
- * Iterate through all clocks, setting the dvfs rate to the current clock
- * rate on all auto dvfs clocks, and to the saved dvfs rate on all manual
- * dvfs clocks.  Used to enable dvfs during late init, after the regulators
- * are available.
- */
-void __init tegra_clk_set_dvfs_rates(void)
-{
-	unsigned long flags;
-	struct clk *c;
-
-	mutex_lock(&clock_list_lock);
-
-	list_for_each_entry(c, &clocks, node) {
-		clk_lock_save(c, flags);
-		if (clk_is_auto_dvfs(c)) {
-			if (c->refcnt > 0)
-				tegra_dvfs_set_rate(c, clk_get_rate_locked(c));
-			else
-				tegra_dvfs_set_rate(c, 0);
-		} else if (clk_is_dvfs(c)) {
-			tegra_dvfs_set_rate(c, c->dvfs_rate);
-		}
-		clk_unlock_restore(c, flags);
-	}
-
-	mutex_unlock(&clock_list_lock);
-}
-
-/*
  * Iterate through all clocks, disabling any for which the refcount is 0
  * but the clock init detected the bootloader left the clock on.
  */
@@ -570,7 +539,6 @@ int __init tegra_late_init_clock(void)
 {
 	tegra_dvfs_late_init();
 	tegra_disable_boot_clocks();
-	tegra_clk_set_dvfs_rates();
 	return 0;
 }
 late_initcall(tegra_late_init_clock);
@@ -694,7 +662,7 @@ static void dvfs_show_one(struct seq_file *s, struct dvfs *d, int level)
 {
 	seq_printf(s, "%*s  %-*s%21s%d mV\n",
 			level * 3 + 1, "",
-			30 - level * 3, d->reg_id,
+			30 - level * 3, d->dvfs_rail->reg_id,
 			"",
 			d->cur_millivolts);
 }
@@ -702,7 +670,6 @@ static void dvfs_show_one(struct seq_file *s, struct dvfs *d, int level)
 static void clock_tree_show_one(struct seq_file *s, struct clk *c, int level)
 {
 	struct clk *child;
-	struct dvfs *d;
 	const char *state = "uninit";
 	char div[8] = {0};
 
@@ -735,8 +702,8 @@ static void clock_tree_show_one(struct seq_file *s, struct clk *c, int level)
 		30 - level * 3, c->name,
 		state, c->refcnt, div, clk_get_rate_all_locked(c));
 
-	list_for_each_entry(d, &c->dvfs, node)
-		dvfs_show_one(s, d, level + 1);
+	if (c->dvfs)
+		dvfs_show_one(s, c->dvfs, level + 1);
 
 	list_for_each_entry(child, &clocks, node) {
 		if (child->parent != c)