diff options
author | Prashant Gaikwad <pgaikwad@nvidia.com> | 2011-04-28 15:48:44 +0530 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:42:34 -0800 |
commit | 8529f25e107d3fedfa9a6579b6bbeaaae684ce54 (patch) | |
tree | ce6ffb16eb8966ffc5044be38e7a362d87609d68 /arch/arm/mach-tegra/clock.h | |
parent | 4733fc053c2ca044936acacc36b3324737deb07d (diff) |
ARM: tegra: clocks: make pclk div dynamic
dynamic changing of pclk divider to follow APB clock minimum
frequency requirements with respect to sclk frequency.
Bug 819796
Original-Change-Id: Id6d4f9321fe3d49922ace9b50cb6e5114f63b9b5
Reviewed-on: http://git-master/r/29643
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rb722438f9370900d4536ef9e09a6bcad29521ce0
Diffstat (limited to 'arch/arm/mach-tegra/clock.h')
-rw-r--r-- | arch/arm/mach-tegra/clock.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/clock.h b/arch/arm/mach-tegra/clock.h index 3c8710076d64..1eeadf30f0c6 100644 --- a/arch/arm/mach-tegra/clock.h +++ b/arch/arm/mach-tegra/clock.h @@ -165,6 +165,13 @@ struct clk { enum cpu_mode mode; } cpu; struct { + struct clk *pclk; + struct clk *hclk; + struct clk *sclk_low; + struct clk *sclk_high; + unsigned long threshold; + } system; + struct { struct list_head node; bool enabled; unsigned long rate; |