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author | Alex Frid <afrid@nvidia.com> | 2011-07-30 19:13:07 -0700 |
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committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:49:40 -0800 |
commit | 6c6f3f7d9e1e27ea2bc1195d8eb2bd995b9ef6b3 (patch) | |
tree | accde04f1b3e3a21ea7359e9511dffdb97b50f27 /arch/arm/mach-tegra/clock.h | |
parent | 60302370d8a9f812928d2606d80e2e10957e0153 (diff) |
ARM: tegra: clock: Set Tegra3 2D/3D idle divisors
Enable 2nd level hardware controlled clock gating.
(cherry picked from commit 9dc6277e84a504d30dd5c07853301decf66c3060)
(cherry picked from commit 0f5ec1901932d78796e143c730ebd9e3f4ffc397)
Change-Id: I219a7fcd0e6ee47418cdd444cc101a1c6b266e1f
Reviewed-on: http://git-master/r/61706
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R65f5ecab707df40f9e98e954420245c9a4a2c476
Diffstat (limited to 'arch/arm/mach-tegra/clock.h')
-rw-r--r-- | arch/arm/mach-tegra/clock.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/clock.h b/arch/arm/mach-tegra/clock.h index 33325470a3d3..a04b2f1ccdec 100644 --- a/arch/arm/mach-tegra/clock.h +++ b/arch/arm/mach-tegra/clock.h @@ -52,6 +52,7 @@ #define MUX_CLK_OUT (1 << 19) #define PLLM (1 << 20) #define DIV_U71_INT (1 << 21) +#define DIV_U71_IDLE (1 << 22) #define ENABLE_ON_INIT (1 << 28) #define PERIPH_ON_APB (1 << 29) |