ARM: tegra: clock: Skip clocks in Tegra3 CPU set rate

Reduced Tegra3 CPU clock frequency by skipping every other clock
during clock rate change when either old or new rate is above 800MHz.
This limits max possible frequency jump when switching between main
and back-up clock sources.

Added sysfs entry for minimum time to run at reduced frequency (in
microseconds): /sys/module/tegra3_clocks/parameters/skipper_delay.
Default delay is 10us. It should be adjusted by board initialization
code based on board power distribution grid capabilities.

Bug 868692

Change-Id: I0c32a3eb91512ba610c4f842bd22ef08e9c889d0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/72682
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-on: http://git-master/r/75140
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/arch/arm/mach-tegra/clock.h b/arch/arm/mach-tegra/clock.h
index 2bb0fa76a8c3..41a4d3f35b4c 100644
--- a/arch/arm/mach-tegra/clock.h
+++ b/arch/arm/mach-tegra/clock.h
@@ -239,6 +239,7 @@ int clk_set_rate_locked(struct clk *c, unsigned long rate);
 int clk_set_parent_locked(struct clk *c, struct clk *parent);
 int tegra_clk_shared_bus_update(struct clk *c);
 void tegra2_sdmmc_tap_delay(struct clk *c, int delay);
+void tegra3_set_cpu_skipper_delay(int delay);
 int tegra_emc_set_rate(unsigned long rate);
 long tegra_emc_round_rate(unsigned long rate);
 struct clk *tegra_emc_predict_parent(unsigned long rate, u32 *div_value);