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authorTodd Poynor <toddpoynor@google.com>2011-02-24 16:24:37 -0800
committerTodd Poynor <toddpoynor@google.com>2011-02-24 16:38:22 -0800
commitbb2a3184bc3c7d1500a1fc6691d83e318e89f61c (patch)
tree3395e06c2f681f0fa5df916fa5985f668ad5eaea /arch/arm/mach-tegra/cortex-a9.S
parent996d8ccfe7ee48dabe8f46358159985e0a410c08 (diff)
ARM: tegra: PL310 restore dynamic clock gating on resume
Tegra 2.6.36 code needs to restore PL310 dynamic clock gating upon resume from a power event. As of 2.6.39 the PL310 is re-init'ed from scratch upon resume, and this patch can be dropped. Change-Id: I8c1fb1add3c3cfcffff58fab642b84d8d5a7a90a Signed-off-by: Todd Poynor <toddpoynor@google.com>
Diffstat (limited to 'arch/arm/mach-tegra/cortex-a9.S')
-rw-r--r--arch/arm/mach-tegra/cortex-a9.S2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/cortex-a9.S b/arch/arm/mach-tegra/cortex-a9.S
index 91d787f2adcb..1ca815d0fab8 100644
--- a/arch/arm/mach-tegra/cortex-a9.S
+++ b/arch/arm/mach-tegra/cortex-a9.S
@@ -536,6 +536,8 @@ ENTRY(__cortex_a9_l2x0_restart)
str r6, [r9, #L2X0_DATA_LATENCY_CTRL]
str r7, [r9, #L2X0_PREFETCH_OFFSET]
str r4, [r9, #L2X0_AUX_CTRL]
+ mov r4, #0x2 @ L2X0_DYNAMIC_CLK_GATING_EN
+ str r4, [r9, #L2X0_PWR_CTRL]
cmp r0, #0
beq __reenable_l2x0