ARM: Tegra: Support to update edp zones

Tegra cpu-freq driver will now recognize edp zones
and cap the max cpu freq for that zone. The temperature
monitoring driver will be giving inputs to cpu-freq
on the current temperature which would be interpreted
by the cpu-freq driver appropriately.

Original-Change-Id: I918eb31771aa7e1e1a5f25438edded727de6eb8c
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/31339
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

Rebase-Id: R6d93bf69d0731ce4ae84f80d1e9013378483331c

1 files changed, 42 insertions, 3 deletions

diff --git a/arch/arm/mach-tegra/cpu-tegra.c b/arch/arm/mach-tegra/cpu-tegra.c
index 4c15b3af35c5..a59af561f456 100644
--- a/arch/arm/mach-tegra/cpu-tegra.c
+++ b/arch/arm/mach-tegra/cpu-tegra.c
@@ -37,6 +37,7 @@
 #include <asm/system.h>
 
 #include <mach/clk.h>
+#include <mach/edp.h>
 
 #include "clock.h"
 #include "pm.h"
@@ -45,7 +46,6 @@
    to be in ascending order */
 static struct cpufreq_frequency_table *freq_table;
 
-
 static struct clk *cpu_clk;
 static struct clk *emc_clk;
 
@@ -226,6 +226,44 @@ static unsigned int edp_governor_speed(unsigned int requested_speed)
 		return edp_limit;
 }
 
+int tegra_edp_update_thermal_zone(int temperature)
+{
+	int i;
+	int ret = 0;
+	int nlimits = cpu_edp_limits_size;
+	int index;
+
+	if (!cpu_edp_limits)
+		return -EINVAL;
+
+	index = nlimits - 1;
+
+	if (temperature < cpu_edp_limits[0].temperature) {
+		index = 0;
+	} else {
+		for (i = 0; i < (nlimits - 1); i++) {
+			if (temperature >= cpu_edp_limits[i].temperature &&
+			   temperature < cpu_edp_limits[i + 1].temperature) {
+				index = i + 1;
+				break;
+			}
+		}
+	}
+
+	mutex_lock(&tegra_cpu_lock);
+
+	edp_thermal_index = index;
+	edp_update_limit();
+	ret = tegra_cpu_cap_highest_speed(NULL);
+	if (ret)
+		pr_err("%s: update cpu speed fail(%d)", __func__, ret);
+
+	mutex_unlock(&tegra_cpu_lock);
+
+	return ret;
+}
+EXPORT_SYMBOL_GPL(tegra_edp_update_thermal_zone);
+
 static int tegra_cpu_edp_notify(
 	struct notifier_block *nb, unsigned long event, void *hcpu)
 {
@@ -247,6 +285,7 @@ static int tegra_cpu_edp_notify(
 				cpu_clear(cpu, edp_cpumask);
 				edp_update_limit();
 			}
+
 			printk(KERN_DEBUG "tegra CPU:%sforce EDP limit %u kHz"
 				"\n", ret ? " failed to " : " ", new_speed);
 		}
@@ -295,7 +334,7 @@ static void tegra_cpu_edp_exit(void)
 void tegra_init_cpu_edp_limits(const struct tegra_edp_limits *limits, int size)
 {
 	cpu_edp_limits = limits;
-	cpu_edp_limits_size = cpu_edp_limits_size;
+	cpu_edp_limits_size = size;
 }
 
 #else	/* CONFIG_TEGRA_EDP_LIMITS */
@@ -573,7 +612,7 @@ static void __exit tegra_cpufreq_exit(void)
 #endif
 	tegra_cpu_edp_exit();
 	tegra_auto_hotplug_exit();
-        cpufreq_unregister_driver(&tegra_cpufreq_driver);
+	cpufreq_unregister_driver(&tegra_cpufreq_driver);
 }