diff options
| author | Alex Frid <afrid@nvidia.com> | 2011-08-23 22:52:42 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:48:47 -0800 |
| commit | 5a8cb95d768cfd40252cf3b1cd15a97f52db5143 (patch) | |
| tree | d2b2c7f103e8ca0c189dbfe5d3adf355bd3912fb /arch/arm/mach-tegra/cpu-tegra.c | |
| parent | e06d79129a87936fc074afc1f3da3c9e5c4cf194 (diff) | |
ARM: tegra: power: Tune Tegra3 hotplug algorithm
- Account for EDP affect on total available MIPS when bringing on-line
(removing off-line) new cpu core. Add multi-core overhead (in percent)
as a parameter - set by default to 10%.
- Add balance level parameter: level value (in percent) defines minimum
speed ratio used by hotplug algorithm to determine if current CPU cores
are balanced, so that another core may be brought on-line. By default
set to 75%
Added tunables:
/sys/module/cpu_tegra3/parameters/mp_overhead
/sys/module/cpu_tegra3/parameters/balance_level
Bug 865176
Bug 867186
Original-Change-Id: I6f2e175e0b5ed14c4b85794949c1e65d0e7f4a36
Reviewed-on: http://git-master/r/49772
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Tested-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Rebase-Id: Rcfefb570c30bf78f6eae155c3f3f7547ac64f128
Diffstat (limited to 'arch/arm/mach-tegra/cpu-tegra.c')
| -rw-r--r-- | arch/arm/mach-tegra/cpu-tegra.c | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/cpu-tegra.c b/arch/arm/mach-tegra/cpu-tegra.c index 2f3fcc8de945..3711b9f2dc97 100644 --- a/arch/arm/mach-tegra/cpu-tegra.c +++ b/arch/arm/mach-tegra/cpu-tegra.c @@ -180,6 +180,40 @@ int tegra_edp_update_thermal_zone(int temperature) } EXPORT_SYMBOL_GPL(tegra_edp_update_thermal_zone); +bool tegra_cpu_edp_favor_up(unsigned int n, int mp_overhead) +{ + unsigned int current_limit, next_limit; + + if (n == 0) + return true; + + if (n >= ARRAY_SIZE(cpu_edp_limits->freq_limits)) + return false; + + current_limit = cpu_edp_limits[edp_thermal_index].freq_limits[n-1]; + next_limit = cpu_edp_limits[edp_thermal_index].freq_limits[n]; + + return ((next_limit * (n + 1)) > + (current_limit * n * (100 + mp_overhead) / 100)); +} + +bool tegra_cpu_edp_favor_down(unsigned int n, int mp_overhead) +{ + unsigned int current_limit, next_limit; + + if (n <= 1) + return false; + + if (n > ARRAY_SIZE(cpu_edp_limits->freq_limits)) + return true; + + current_limit = cpu_edp_limits[edp_thermal_index].freq_limits[n-1]; + next_limit = cpu_edp_limits[edp_thermal_index].freq_limits[n-2]; + + return ((next_limit * (n - 1) * (100 + mp_overhead) / 100)) > + (current_limit * n); +} + static int tegra_cpu_edp_notify( struct notifier_block *nb, unsigned long event, void *hcpu) { |