diff options
| author | Bo Yan <byan@nvidia.com> | 2012-10-14 22:37:02 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 12:38:39 -0700 |
| commit | b35f78ca5335a039a74524923be65b27977de2d9 (patch) | |
| tree | f8865ac8f5b2eb76413cc433f1feda3d2d900a75 /arch/arm/mach-tegra/cpuidle-t11x.c | |
| parent | 7e9b2c897a96e12f52fdc2e715290d41652d40d1 (diff) | |
ARM: tegra11x: fast cluster power down control
Currently, we are using "power_gating" to control what power down
mode to choose for fast cluster. With this change, a new sysfs
node "fast_cluster_power_down_mode" is used for that purpose. This
node is an unsigned integer with only 2 LSB used. '00' means power
gating CPU only, '01' means power gating non-CPU partition as well,
'10' means rail-gating the entire fast cluster, '11' means emulation
mode, which shall not be selected in production environment.
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/144769
(cherry picked from commit 08cf1b25cbcfbb46822f76d08313ed1a9be6fc28)
Change-Id: I1a8a79cbd9f1f3ddce0b0f3d42fb3747284ac58e
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/146486
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Rebase-Id: R619facf202528adc6cfab1c93d482671a5e415b0
Diffstat (limited to 'arch/arm/mach-tegra/cpuidle-t11x.c')
| -rw-r--r-- | arch/arm/mach-tegra/cpuidle-t11x.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/cpuidle-t11x.c b/arch/arm/mach-tegra/cpuidle-t11x.c index 4d51a1674857..f841cbcf7c98 100644 --- a/arch/arm/mach-tegra/cpuidle-t11x.c +++ b/arch/arm/mach-tegra/cpuidle-t11x.c @@ -83,6 +83,9 @@ module_param(cpu_power_gating_in_idle, ulong, 0644); static bool slow_cluster_power_gating_noncpu __read_mostly; module_param(slow_cluster_power_gating_noncpu, bool, 0644); +static uint fast_cluster_power_down_mode __read_mostly; +module_param(fast_cluster_power_down_mode, uint, 0644); + static struct clk *cpu_clk_for_dvfs; static int lp2_exit_latencies[5]; @@ -267,7 +270,9 @@ static bool tegra_cpu_cluster_power_down(struct cpuidle_device *dev, flag = TEGRA_POWER_CLUSTER_PART_NONCPU; } else { tegra_dvfs_rail_off(tegra_cpu_rail, entry_time); - flag = get_power_gating_partition(); + flag = (fast_cluster_power_down_mode + << TEGRA_POWER_CLUSTER_PART_SHIFT) + && TEGRA_POWER_CLUSTER_PART_MASK; } if (tegra_idle_lp2_last(sleep_time, flag) == 0) @@ -416,7 +421,9 @@ bool tegra11x_idle_lp2(struct cpuidle_device *dev, s64 request = ktime_to_us(tick_nohz_get_sleep_length()); tegra_set_cpu_in_lp2(dev->cpu); - cpu_gating_only = get_power_gating_partition() ? false : true; + cpu_gating_only = (((fast_cluster_power_down_mode + << TEGRA_POWER_CLUSTER_PART_SHIFT) + && TEGRA_POWER_CLUSTER_PART_MASK) == 0); if (is_lp_cluster()) { if (slow_cluster_power_gating_noncpu) |