diff options
| author | Alex Frid <afrid@nvidia.com> | 2012-01-28 17:36:37 -0800 |
|---|---|---|
| committer | Rohan Somvanshi <rsomvanshi@nvidia.com> | 2012-02-03 05:56:00 -0800 |
| commit | de067308cce5e1adacc29e5d2fa4459a7f380fb2 (patch) | |
| tree | 9a1707e6b1540a3c9478cec4c7df6e4e68aff27b /arch/arm/mach-tegra/cpuidle-t3.c | |
| parent | 5d89a46f865411446813018b5072c89845820cd1 (diff) | |
ARM: tegra: power: Re-factor Tegra3 secondary CPU LP2 entry
When Tegra3 secondary CPU is entering LP2, read TWD timer state
into context structure, rather than separate local variables.
Reviewed-on: http://git-master/r/77957
Change-Id: I237eafc50a11d535b94f334631d039ba9c4bf44b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78899
Reviewed-by: Automatic_Commit_Validation_User
Diffstat (limited to 'arch/arm/mach-tegra/cpuidle-t3.c')
| -rw-r--r-- | arch/arm/mach-tegra/cpuidle-t3.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/arch/arm/mach-tegra/cpuidle-t3.c b/arch/arm/mach-tegra/cpuidle-t3.c index 8e0122f0bed8..fb51e25e75e9 100644 --- a/arch/arm/mach-tegra/cpuidle-t3.c +++ b/arch/arm/mach-tegra/cpuidle-t3.c @@ -293,14 +293,15 @@ static void tegra3_idle_enter_lp2_cpu_n(struct cpuidle_device *dev, { #ifdef CONFIG_SMP ktime_t entery_time; - u32 twd_cnt; - u32 twd_ctrl = readl(twd_base + TWD_TIMER_CONTROL); + struct tegra_twd_context twd_context; unsigned long twd_rate = clk_get_rate(twd_clk); - if ((twd_ctrl & TWD_TIMER_CONTROL_ENABLE) && - (twd_ctrl & TWD_TIMER_CONTROL_IT_ENABLE)) { - twd_cnt = readl(twd_base + TWD_TIMER_COUNTER); - request = div_u64((u64)twd_cnt * 1000000, twd_rate); + if (!tegra_twd_get_state(&twd_context)) { + if ((twd_context.twd_ctrl & TWD_TIMER_CONTROL_ENABLE) && + (twd_context.twd_ctrl & TWD_TIMER_CONTROL_IT_ENABLE)) { + request = div_u64((u64)twd_context.twd_cnt * 1000000, + twd_rate); + } } if (request < tegra_lp2_exit_latency) { |