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| author | Scott Williams <scwilliams@nvidia.com> | 2011-07-14 13:34:25 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:46:54 -0800 |
| commit | 438bca464cf4c85ad1f3b994fd857f87755ab954 (patch) | |
| tree | 1a3da5967c2cc0e04d11f804470c9567c10d2e3a /arch/arm/mach-tegra/cpuidle.c | |
| parent | f81cfd3935d44d7a13b9aa6d24851389e663660f (diff) | |
ARM: tegra: power: Eliminate extraneous PMC register writes
Writes to PMC registers in the 32 KHz domain are extremely slow.
Write PMC SCRATCH0/SCRATCH1 regsiters only when entering LP0.
Change-Id: Ib85b436330a8a9a0dc7fbc56889a375a534b8d10
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Rebase-Id: R8267387cbe889727ca429c2c6dc44630a061c808
Diffstat (limited to 'arch/arm/mach-tegra/cpuidle.c')
0 files changed, 0 insertions, 0 deletions