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authorScott Williams <scwilliams@nvidia.com>2010-12-22 13:44:20 -0800
committerDan Willemsen <dwillemsen@nvidia.com>2011-11-30 21:42:03 -0800
commit59c211f7e1aa4c6f948c289419d3facdf687d92f (patch)
tree3f12dc26508c43bf14e6db0b3cecbd9e111fb8ee /arch/arm/mach-tegra/cpuidle.c
parent191914c96cd231c067a2895db19e512423a6c7d9 (diff)
PARTIAL arm: tegra3: Add CPU idle support
Original-Change-Id: I5464b01ebb454b7fdc6fd316ba31de110a642063 Reviewed-on: http://git-master/r/14167 Tested-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Jin Qian <jqian@nvidia.com> Tested-by: Jin Qian <jqian@nvidia.com> Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Original-Change-Id: I201cdb6dc4e78f762266cb96e48689d4d4f963f6 Rebase-Id: Rb3ac2fff9435330ec65c5541d369b743c9cb898f
Diffstat (limited to 'arch/arm/mach-tegra/cpuidle.c')
-rw-r--r--arch/arm/mach-tegra/cpuidle.c13
1 files changed, 2 insertions, 11 deletions
diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c
index 7eed5c11127f..73798688240f 100644
--- a/arch/arm/mach-tegra/cpuidle.c
+++ b/arch/arm/mach-tegra/cpuidle.c
@@ -43,15 +43,6 @@
#include "pm.h"
#include "sleep.h"
-#if defined(CONFIG_ARCH_TEGRA_2x_SOC)
-#define TEGRA_CPUIDLE_BOTH_IDLE INT_QUAD_RES_24
-#define TEGRA_CPUIDLE_TEAR_DOWN INT_QUAD_RES_25
-#else
-/* !!!FIXME!!! THIS MODEL IS BROKEN ON T30 -- 4 CPUS BREAKS THE "BOTH" IDLE CONCEPT .....*/
-#define TEGRA_CPUIDLE_BOTH_IDLE INT_QUINT_RES_24
-#define TEGRA_CPUIDLE_TEAR_DOWN INT_QUINT_RES_25
-#endif
-
static bool lp2_in_idle __read_mostly = true;
module_param(lp2_in_idle, bool, 0644);
@@ -193,13 +184,13 @@ static int __init tegra_cpuidle_init(void)
{
unsigned int cpu;
void __iomem *mask_arm;
- unsigned int reg;
+ u32 reg;
int ret;
mask_arm = IO_ADDRESS(TEGRA_CLK_RESET_BASE) + CLK_RESET_CLK_MASK_ARM;
reg = readl(mask_arm);
- writel(reg | (1<<31), mask_arm);
+ __raw_writel(reg | (1<<31), mask_arm);
ret = cpuidle_register_driver(&tegra_idle);