summaryrefslogtreecommitdiff
path: root/arch/arm/mach-tegra/cpuidle.c
diff options
context:
space:
mode:
authorAlex Frid <afrid@nvidia.com>2011-09-28 20:41:30 -0700
committerDan Willemsen <dwillemsen@nvidia.com>2011-11-30 21:49:36 -0800
commitf6c9111abff52b32e62d13e7e54d1d7cb9458ad2 (patch)
treef45a65ff38eca3c18574c31e41dd116a40666882 /arch/arm/mach-tegra/cpuidle.c
parentf7b2a737ff608e14a97f5941e50d707ad94d8786 (diff)
ARM: tegra: power: Fix LP2/LP3 states accounting on Tegra3
- Made sure LP3 state is reported as last entered state to cpuidle governor in case when LP3 is entered as a fall back from LP2 path. - Accumulate idle time designated to LP2 state by cpuidle governor and time actually spent in LP2 by each CPU separately. Update LP2 statistic output. Change-Id: I55b461e94925ba7a41112756ed958f81fc0bc882 Reviewed-on: http://git-master/r/60381 Tested-by: Aleksandr Frid <afrid@nvidia.com> Tested-by: Gerrit_Virtual_Submit Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Rebase-Id: R240873bd1de225696d392ac5ba2c3d517c59d86e
Diffstat (limited to 'arch/arm/mach-tegra/cpuidle.c')
-rw-r--r--arch/arm/mach-tegra/cpuidle.c13
1 files changed, 8 insertions, 5 deletions
diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c
index a51a72a985c3..bdf45f81f9da 100644
--- a/arch/arm/mach-tegra/cpuidle.c
+++ b/arch/arm/mach-tegra/cpuidle.c
@@ -122,12 +122,15 @@ static int tegra_idle_enter_lp2(struct cpuidle_device *dev,
hrtimer_peek_ahead_timers();
smp_rmb();
- state->exit_latency = tegra_lp2_exit_latency;
- state->target_residency = tegra_lp2_exit_latency +
- tegra_lp2_power_off_time;
- if (state->target_residency < tegra_lp2_min_residency)
- state->target_residency = tegra_lp2_min_residency;
+ /* Update LP2 latency provided no fall back to LP3 */
+ if (state == dev->last_state) {
+ state->exit_latency = tegra_lp2_exit_latency;
+ state->target_residency = tegra_lp2_exit_latency +
+ tegra_lp2_power_off_time;
+ if (state->target_residency < tegra_lp2_min_residency)
+ state->target_residency = tegra_lp2_min_residency;
+ }
tegra_cpu_idle_stats_lp2_time(dev->cpu, us);
return (int)us;