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authorAlex Frid <afrid@nvidia.com>2010-06-08 20:49:07 -0700
committerGary King <gking@nvidia.com>2010-06-10 08:59:30 -0700
commit9135f4cd777f6bf20e9b3e90139aa47334e26e0b (patch)
tree89990e73b0319c71ba5a32ebf57e8764bc478f71 /arch/arm/mach-tegra/cpuidle.c
parent3f056ef87f5256910945e4907ca52ec040be7fe5 (diff)
[ARM/tegra] RM: expanded CPU power off (LP2) policies.
Expanded CPU power off (LP2 state) policies as follows: (a) "Enter in Low Corner" - LP2 is entered and DVFS tick interrupt is masked only when DVFS is in low corner. (b) "Mask in Low Corner" - LP2 is entered independently of DVFS, but DVFS tick interrupt is masked only when low corner is hit (c) "Ignore Low Corner" - LP2 is entered and DVFS tick interrupt is masked independently of DVFS low corner. Ported from android-tegra-2.6.29, but set default policy to (c), which is the same as current android-tegra-2.6.32 kernel behavior (on 2.6.29 kernel (a) was default). Added sysfs node to change and evaluate policies. Change-Id: I22e89f4d58dfa2e2fb668154c1ae2cd301fbe1ca Reviewed-on: http://git-master/r/2359 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/cpuidle.c')
-rw-r--r--arch/arm/mach-tegra/cpuidle.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c
index bea34e6d622c..e2a61708fc86 100644
--- a/arch/arm/mach-tegra/cpuidle.c
+++ b/arch/arm/mach-tegra/cpuidle.c
@@ -87,6 +87,7 @@ static int tegra_idle_enter_lp3(struct cpuidle_device *dev,
return (int)us;
}
+extern bool tegra_nvrm_lp2_allowed(void);
extern unsigned int tegra_suspend_lp2(unsigned int);
static int tegra_idle_enter_lp2(struct cpuidle_device *dev,
@@ -102,7 +103,7 @@ static int tegra_idle_enter_lp2(struct cpuidle_device *dev,
smp_rmb();
request = ktime_to_us(tick_nohz_get_sleep_length());
if (!lp2_supported || request <= state->exit_latency ||
- system_is_suspending) {
+ system_is_suspending || (!tegra_nvrm_lp2_allowed())) {
dev->last_state = &dev->states[0];
return tegra_idle_enter_lp3(dev, &dev->states[0]);
}