diff options
author | minwuklee <mlee@nvidia.com> | 2010-12-01 14:34:15 +0900 |
---|---|---|
committer | Bharat Nihalani <bnihalani@nvidia.com> | 2010-12-01 03:54:29 -0800 |
commit | a0f54090dbf76ec1f07410caf302560e00ee46ef (patch) | |
tree | 554be9865de6fa330864217374738b95761af7be /arch/arm/mach-tegra/dma.c | |
parent | 0d47e62d9e2a08831c40d2debfad7ece6eab30d2 (diff) |
[tegra:dma] set dma burst size for spi/slink
for spi/slink, set dma burst size based on
transfer size.
bug 747979
Change-Id: I8c3c0a0410648a25190847590b9ac0304fb1105f
Reviewed-on: http://git-master/r/11752
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/dma.c')
-rwxr-xr-x[-rw-r--r--] | arch/arm/mach-tegra/dma.c | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/dma.c b/arch/arm/mach-tegra/dma.c index 97335c0f93fb..e0a77a50d092 100644..100755 --- a/arch/arm/mach-tegra/dma.c +++ b/arch/arm/mach-tegra/dma.c @@ -469,7 +469,27 @@ static void tegra_dma_update_hw(struct tegra_dma_channel *ch, u32 csr; csr = CSR_IE_EOC | CSR_FLOW; - ahb_seq = AHB_SEQ_INTR_ENB | AHB_SEQ_BURST_1; + ahb_seq = AHB_SEQ_INTR_ENB; + + switch(req->req_sel) { + case TEGRA_DMA_REQ_SEL_SL2B1: + case TEGRA_DMA_REQ_SEL_SL2B2: + case TEGRA_DMA_REQ_SEL_SL2B3: + case TEGRA_DMA_REQ_SEL_SL2B4: + case TEGRA_DMA_REQ_SEL_SPI: + /* For spi/slink the burst size based on transfer size + * i.e. if multiple of 16 bytes then busrt is + * 4 word else burst size is 1 word */ + if (req->size & 0xF) + ahb_seq |= AHB_SEQ_BURST_1; + else + ahb_seq |= AHB_SEQ_BURST_4; + break; + default: + ahb_seq |= AHB_SEQ_BURST_1; + break; + } + apb_seq = 0; csr |= req->req_sel << CSR_REQ_SEL_SHIFT; |