diff options
| author | Alex Frid <afrid@nvidia.com> | 2012-12-05 23:41:19 -0800 |
|---|---|---|
| committer | Rohan Somvanshi <rsomvanshi@nvidia.com> | 2012-12-18 05:35:19 -0800 |
| commit | f115428fa770a05ee001917d430f238e600a8c9b (patch) | |
| tree | a343c65ec857fe095bd8a5749dc28f4226cf8901 /arch/arm/mach-tegra/dvfs.c | |
| parent | 0930dc9aa8d43b331906bbe1e5fb317dc16f66f1 (diff) | |
ARM: tegra11: dvfs: Add CPU rail DFLL mode trip-point
Added CPU rail DFLL mode trip-point necessary to limit minimum CPU
voltage at cold temperature. The respective cooling device is not
implemented, yet.
Bug 1177204
Change-Id: I6abe1bc3ace81935c25968385af1998052455da0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/168999
(cherry picked from commit d4f6d935f8e616852cfe83cc19cadf137169b239)
Reviewed-on: http://git-master/r/171628
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/dvfs.c')
| -rw-r--r-- | arch/arm/mach-tegra/dvfs.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/dvfs.c b/arch/arm/mach-tegra/dvfs.c index 03c546d6e6bc..0f03e38bb4a2 100644 --- a/arch/arm/mach-tegra/dvfs.c +++ b/arch/arm/mach-tegra/dvfs.c @@ -809,6 +809,13 @@ int tegra_dvfs_dfll_mode_clear(struct dvfs *d, unsigned long rate) return ret; } +struct tegra_cooling_device *tegra_dvfs_get_cpu_dfll_cdev(void) +{ + if (tegra_cpu_rail) + return tegra_cpu_rail->dfll_mode_cdev; + return NULL; +} + /* * Iterate through all the dvfs regulators, finding the regulator exported * by the regulator api for each one. Must be called in late init, after |