diff options
| author | Alex Frid <afrid@nvidia.com> | 2011-10-21 22:02:53 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:49:46 -0800 |
| commit | 1ab4a78e1a998cbe33fed78b5365e518f1f0cf25 (patch) | |
| tree | 09fc960dd10593274cf223d498b076cb442e1d72 /arch/arm/mach-tegra/dvfs.h | |
| parent | 8eb7374dbf3c7b312d23e36f80dcd685e09a3738 (diff) | |
ARM: tegra: dvfs: Enable EMC bridge if rail is disabled
When core rail is disabled it is set to nominal voltage underneath
clock framework. On Tegra3 DDR3 platforms low EMC rates are not safe
at high voltage that exceeds EMC bridge minimum level. Enable EMC
bridge explicitly in this case to set safe floor for EMC. Similarly
need to enable EMC bridge when CPU rail is disabled and pushing core
voltage (cpu-to-core voltage dependency) over bridge minimum level.
(cherry picked from commit bff814b2e46e67defde178b72bd379003b5429c2)
(cherry picked from commit e5567cb8dafcbd30797237e7bb91d77ce57de66a)
Change-Id: Ibb8dad5132f69e3325d793658b3dcc8b887974bf
Reviewed-on: http://git-master/r/62031
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Rebase-Id: R56f360c3b1ee25bf2dae4b886399b83e357f0225
Diffstat (limited to 'arch/arm/mach-tegra/dvfs.h')
| -rw-r--r-- | arch/arm/mach-tegra/dvfs.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/dvfs.h b/arch/arm/mach-tegra/dvfs.h index 85077c005525..d867ac4299cf 100644 --- a/arch/arm/mach-tegra/dvfs.h +++ b/arch/arm/mach-tegra/dvfs.h @@ -97,6 +97,7 @@ void tegra_dvfs_add_relationships(struct dvfs_relationship *rels, int n); void tegra_dvfs_rail_enable(struct dvfs_rail *rail); void tegra_dvfs_rail_disable(struct dvfs_rail *rail); bool tegra_dvfs_rail_updating(struct clk *clk); +struct dvfs_rail *tegra_dvfs_get_rail_by_name(const char *reg_id); int tegra_dvfs_predict_millivolts(struct clk *c, unsigned long rate); void tegra_dvfs_core_cap_enable(bool enable); void tegra_dvfs_core_cap_level_set(int level); @@ -119,6 +120,8 @@ static inline void tegra_dvfs_rail_disable(struct dvfs_rail *rail) {} static inline bool tegra_dvfs_rail_updating(struct clk *clk) { return false; } +static inline struct dvfs_rail *tegra_dvfs_get_rail_by_name(const char *reg_id) +{ return NULL; } static inline int tegra_dvfs_predict_millivolts(struct clk *c, unsigned long rate) { return 0; } static inline void tegra_dvfs_core_cap_enable(bool enable) @@ -127,4 +130,14 @@ static inline void tegra_dvfs_core_cap_level_set(int level) {} #endif +#ifndef CONFIG_ARCH_TEGRA_2x_SOC +int tegra_dvfs_rail_disable_prepare(struct dvfs_rail *rail); +int tegra_dvfs_rail_post_enable(struct dvfs_rail *rail); +#else +static inline int tegra_dvfs_rail_disable_prepare(struct dvfs_rail *rail) +{ return 0; } +static inline int tegra_dvfs_rail_post_enable(struct dvfs_rail *rail) +{ return 0; } +#endif + #endif |