diff options
| author | Alex Frid <afrid@nvidia.com> | 2014-04-01 20:10:40 -0700 |
|---|---|---|
| committer | Yu-Huan Hsu <yhsu@nvidia.com> | 2014-04-09 13:40:26 -0700 |
| commit | 8512300b08fe11c66494cbbdd64f39379091a3aa (patch) | |
| tree | 071cf22f0bb9d272adace62f5c745dcb2d2caec1 /arch/arm/mach-tegra/dvfs.h | |
| parent | 0f2c38d284f65d3545ab3f4f3a13c064f7fbb626 (diff) | |
ARM: tegra: dvfs: Tune DFLL low at cold
Added an option to tune DFLL low in the entire voltage range while
temperature is below minimum trip-point; still different tuning setting
are used in low and high voltage ranges while temperature is above cold
trip-point. For now, this option is disabled on all Tegra platforms.
Bug 1492902
Change-Id: Ibf080279b034522add8eed4da15617b59ac1a59a
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/391123
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/dvfs.h')
| -rw-r--r-- | arch/arm/mach-tegra/dvfs.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/dvfs.h b/arch/arm/mach-tegra/dvfs.h index da34dfe2680d..8cf8357576a1 100644 --- a/arch/arm/mach-tegra/dvfs.h +++ b/arch/arm/mach-tegra/dvfs.h @@ -130,6 +130,7 @@ struct dvfs_dfll_data { u32 tune0; u32 tune0_high_mv; u32 tune1; + bool tune0_low_at_cold; unsigned long droop_rate_min; unsigned long use_dfll_rate_min; unsigned long out_rate_min; |