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authorHyung Taek Ryoo <hryoo@nvidia.com>2012-07-31 15:43:34 -0700
committerSimone Willett <swillett@nvidia.com>2012-08-06 12:12:31 -0700
commit9bf22a62cd071336282e3fa5d999f898e77119d1 (patch)
tree123fcf5de57343f49ff6d07639235d82e04e0a87 /arch/arm/mach-tegra/headsmp.S
parent76fd6572b00e780a2a00cc2ee21b9f30d968cb5e (diff)
arm: tegra: optimize L2 enable/disable paths for secureos
For the CONFIG_TRUSTED_FOUNDATION code paths, differentiate L2 enable vs. reenable, which are different SMCs (won't trigger an invalidate in the case of a reenable). On an L2 disable SMC, optionally pass a 0 for the L2 ways arg, which skips the full clean/invalidate (and simply just disabled the L2). In order to safely skip flushing the L2 on the disable, we have to be careful what we dirty from the type we flush the L1 and disable the L2. Bug 939415 Signed-off-by: Chris Johnson<cwj@nvidia.com> Change-Id: I756d2ceda83d5d8d6bc5670218e9d874d5e5f62a Reviewed-on: http://git-master/r/119786 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/headsmp.S')
-rw-r--r--arch/arm/mach-tegra/headsmp.S7
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/headsmp.S b/arch/arm/mach-tegra/headsmp.S
index 4e28a558cc38..63852b99b3d3 100644
--- a/arch/arm/mach-tegra/headsmp.S
+++ b/arch/arm/mach-tegra/headsmp.S
@@ -3,7 +3,7 @@
*
* CPU initialization routines for Tegra SoCs
*
- * Copyright (c) 2009-2011, NVIDIA Corporation.
+ * Copyright (c) 2009-2012, NVIDIA Corporation. All rights reserved.
* Copyright (c) 2011 Google, Inc.
* Author: Colin Cross <ccross@android.com>
* Gary King <gking@nvidia.com>
@@ -90,8 +90,9 @@ ENTRY(tegra_resume)
str r1, [r0]
#ifdef CONFIG_TRUSTED_FOUNDATIONS
- /* wake up (should have specified args?) */
- bl tegra_generic_smc
+ /* wake up */
+ mov r0, #0x00000003
+ bl tegra_generic_smc_local
#endif
b tegra_cpu_resume_phys