diff options
| author | tkasivajhula <tkasivajhula@nvidia.com> | 2010-01-20 18:15:58 -0800 |
|---|---|---|
| committer | tkasivajhula <tkasivajhula@nvidia.com> | 2010-02-03 12:44:45 -0800 |
| commit | 7a459071ca04fe05233e749f8325377ee280cb2e (patch) | |
| tree | 633b3b231ebd4ac9afdf3cf0405e0d52197e6f8d /arch/arm/mach-tegra/idle-t2.c | |
| parent | b07521cfd65d52ed1ee398149e134361eae3988c (diff) | |
tegra power: Add code to direct control to correct power state.
The enter_power_state function needs to transfer control
to the appropriate power function (enter_lp2, enter_lp0 etc).
Change-Id: I466ec00b0e1b89e41b2b3a0402fb62d676ee6291
Diffstat (limited to 'arch/arm/mach-tegra/idle-t2.c')
| -rw-r--r-- | arch/arm/mach-tegra/idle-t2.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/idle-t2.c b/arch/arm/mach-tegra/idle-t2.c index 0f3958d90f8d..ff986f1d0456 100644 --- a/arch/arm/mach-tegra/idle-t2.c +++ b/arch/arm/mach-tegra/idle-t2.c @@ -41,7 +41,7 @@ extern uintptr_t g_resume, g_contextSavePA, g_contextSaveVA; extern NvU32 g_NumActiveCPUs, g_ArmPerif; extern NvU32 g_enterLP2PA; extern volatile void *g_pPMC, *g_pAHB, *g_pCLK_RST_CONTROLLER; -extern volatile void *g_pEMC, *g_pMC, *g_pAPB_MISC; +extern volatile void *g_pEMC, *g_pMC, *g_pAPB_MISC, *g_pIRAM; #ifdef CONFIG_WAKELOCK extern struct wake_lock main_wake_lock; #endif @@ -69,6 +69,7 @@ extern void power_lp0_init(void); extern void NvSpareTimerTrigger(unsigned long); /* timer.c */ NvRmMemHandle s_hWarmboot = NULL; NvU32 g_AvpWarmbootEntry; +NvU32 g_IramPA = 0; NvU32 lp2count = 0, lp3count = 0, lp2safe = 0; @@ -174,6 +175,18 @@ void __init NvAp20InitFlowController(void) return; } + NvRmModuleGetBaseAddress(s_hRmGlobal, + NVRM_MODULE_ID(NvRmPrivModuleID_Iram, 0), &g_IramPA, &len); + + if (NvRmPhysicalMemMap(g_IramPA, len, NVOS_MEM_READ_WRITE, + NvOsMemAttribute_Uncached, + (void**)&g_pIRAM)!=NvSuccess) + { + printk(KERN_INFO "failed to map iram; DVFS will not function" + " correctly as a result\n"); + return; + } + s_pFlowCtrl = pTempFc; g_ArmPerif = (NvU32)pTempArmPerif; |