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authorScott Williams <scwilliams@nvidia.com>2011-03-29 12:29:46 -0700
committerDan Willemsen <dwillemsen@nvidia.com>2011-11-30 21:42:27 -0800
commite9905f2ae642f15ff962c2a463d68fc4208d0369 (patch)
treea7d5a5b8f088a798aceca9d96e79e5b972518f13 /arch/arm/mach-tegra/include/mach/io.h
parentacf746061a2d381ec0fd7d5ba53bd397656d651b (diff)
ARM: tegra: Update Tegra3 io memory mapping
Original-Change-Id: Idc283042ec10cf1b38ca073df138125b03568e2d Rebase-Id: R0cd40c5044f07b57ac3b415c20af7bac31cf46f8
Diffstat (limited to 'arch/arm/mach-tegra/include/mach/io.h')
-rw-r--r--arch/arm/mach-tegra/include/mach/io.h14
1 files changed, 11 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/include/mach/io.h b/arch/arm/mach-tegra/include/mach/io.h
index 88ac07b20069..696f6821c0f7 100644
--- a/arch/arm/mach-tegra/include/mach/io.h
+++ b/arch/arm/mach-tegra/include/mach/io.h
@@ -37,8 +37,8 @@
#define IO_IRAM_VIRT 0xFE400000
#define IO_IRAM_SIZE SZ_256K
-#define IO_CPU_PHYS 0x50000000
-#define IO_CPU_VIRT 0xFE000000
+#define IO_CPU_PHYS 0x50000000
+#define IO_CPU_VIRT 0xFE000000
#define IO_CPU_SIZE SZ_1M
#define IO_PPSB_PHYS 0x60000000
@@ -49,11 +49,19 @@
#define IO_APB_VIRT 0xFE300000
#define IO_APB_SIZE SZ_1M
+#ifdef CONFIG_ARCH_TEGRA_2x_SOC
#define IO_USB_PHYS 0xC5000000
+#else
+#define IO_USB_PHYS 0x7D000000
+#endif
#define IO_USB_VIRT 0xFE500000
#define IO_USB_SIZE SZ_1M
+#ifdef CONFIG_ARCH_TEGRA_2x_SOC
#define IO_SDMMC_PHYS 0xC8000000
+#else
+#define IO_SDMMC_PHYS 0x78000000
+#endif
#define IO_SDMMC_VIRT 0xFE600000
#define IO_SDMMC_SIZE SZ_1M
@@ -73,7 +81,7 @@
IO_TO_VIRT_XLATE((n), IO_CPU_PHYS, IO_CPU_VIRT) : \
IO_TO_VIRT_BETWEEN((n), IO_IRAM_PHYS, IO_IRAM_SIZE) ? \
IO_TO_VIRT_XLATE((n), IO_IRAM_PHYS, IO_IRAM_VIRT) : \
- IO_TO_VIRT_BETWEEN((n), IO_HOST1X_PHYS, IO_HOST1X_SIZE) ? \
+ IO_TO_VIRT_BETWEEN((n), IO_HOST1X_PHYS, IO_HOST1X_SIZE) ? \
IO_TO_VIRT_XLATE((n), IO_HOST1X_PHYS, IO_HOST1X_VIRT) : \
IO_TO_VIRT_BETWEEN((n), IO_USB_PHYS, IO_USB_SIZE) ? \
IO_TO_VIRT_XLATE((n), IO_USB_PHYS, IO_USB_VIRT) : \