diff options
| author | Colin Cross <ccross@android.com> | 2008-12-18 12:05:28 -0800 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:34:24 -0800 |
| commit | 16f891138b0e2742c14b703c7ad3834db87e61ee (patch) | |
| tree | dd14a192a14519ec7602497ce0bfa9be890502bc /arch/arm/mach-tegra/include/mach/nand.h | |
| parent | 31867e6e2bf11be593b0282eb5e873319fc774f3 (diff) | |
[ARM] mtd: NVIDIA Tegra NAND controller driver.
Change-Id: I6f0b18c5621bcf8fb6cde8e7b05828075db72594
CC: Dima Zavin <dima@android.com>
Signed-off-by: Colin Cross <ccross@android.com>
Diffstat (limited to 'arch/arm/mach-tegra/include/mach/nand.h')
| -rw-r--r-- | arch/arm/mach-tegra/include/mach/nand.h | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/include/mach/nand.h b/arch/arm/mach-tegra/include/mach/nand.h new file mode 100644 index 000000000000..2d26fec30f4b --- /dev/null +++ b/arch/arm/mach-tegra/include/mach/nand.h @@ -0,0 +1,54 @@ +/* + * arch/arm/mach-tegra/include/mach/nand.h + * + * Copyright (C) 2010 Google, Inc. + * + * Author: + * Colin Cross <ccross@google.com> + * Dima Zavin <dmitriyz@google.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __MACH_TEGRA_NAND_H +#define __MACH_TEGRA_NAND_H + +struct tegra_nand_chip_parms { + uint8_t vendor_id; + uint8_t device_id; + uint32_t flags; + + uint32_t capacity; + + /* all timing info is in nanoseconds */ + struct { + uint32_t trp; + uint32_t trh; + uint32_t twp; + uint32_t twh; + uint32_t tcs; + uint32_t twhr; + uint32_t tcr_tar_trr; + uint32_t twb; + uint32_t trp_resp; + uint32_t tadl; + } timing; +}; + +struct tegra_nand_platform { + uint8_t max_chips; + struct tegra_nand_chip_parms *chip_parms; + unsigned int nr_chip_parms; + struct mtd_partition *parts; + unsigned int nr_parts; +}; + +#endif |