diff options
| author | Chaitanya Bandi <bandik@nvidia.com> | 2011-09-19 16:45:28 +0530 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:49:43 -0800 |
| commit | 276911c2ce3d7612c787786608a26ce9842aa2d8 (patch) | |
| tree | c98540390e2d2010a89649fc9ac8a6c43eefaf0e /arch/arm/mach-tegra/include/mach/pinmux.h | |
| parent | 4add2bff97dc1be9137dd43e95fd295997aa7213 (diff) | |
ARM: tegra: gpio: Set a gpio to tristate or normal
Create mapping from gpio to pingroup and set gpio to
normal or tristate
Bug 866633
Reviewed-on: http://git-master/r/56557
(cherry picked from commit 321ded98d41170b9e32d60177c6808492ccdf115)
Change-Id: I3d1b979717f1c6b208af3df0a7dfe603e5272d21
Reviewed-on: http://git-master/r/61120
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Rebase-Id: R5991c2cbc11aa35345fde7f08c0bfeb306e85e1e
Diffstat (limited to 'arch/arm/mach-tegra/include/mach/pinmux.h')
| -rw-r--r-- | arch/arm/mach-tegra/include/mach/pinmux.h | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/include/mach/pinmux.h b/arch/arm/mach-tegra/include/mach/pinmux.h index 00d0f92c7ad2..d6a8ce702a94 100644 --- a/arch/arm/mach-tegra/include/mach/pinmux.h +++ b/arch/arm/mach-tegra/include/mach/pinmux.h @@ -145,7 +145,7 @@ enum tegra_mux_func { TEGRA_MUX_VGP5, TEGRA_MUX_VGP6, #endif - TEGRA_MUX_SAFE, + TEGRA_MUX_SAFE, TEGRA_MAX_MUX, }; @@ -316,24 +316,27 @@ struct tegra_pingroup_desc { int funcs[4]; int func_safe; int vddio; - s16 tri_reg; /* offset into the TRISTATE_REG_* register bank */ + s16 tri_reg; /* offset into the TRISTATE_REG_* register bank */ s16 mux_reg; /* offset into the PIN_MUX_CTL_* register bank */ s16 pupd_reg; /* offset into the PULL_UPDOWN_REG_* register bank */ - s8 tri_bit; /* offset into the TRISTATE_REG_* register bit */ + s8 tri_bit; /* offset into the TRISTATE_REG_* register bit */ s8 mux_bit; /* offset into the PIN_MUX_CTL_* register bit */ s8 pupd_bit; /* offset into the PULL_UPDOWN_REG_* register bit */ s8 lock_bit; /* offser of the LOCK bit into mux register bit */ s8 od_bit; /* offset of the OD bit into mux register bit */ s8 ioreset_bit; /* offset of the IO_RESET bit into mux register bit */ s8 io_default; + int gpionr; }; extern const struct tegra_pingroup_desc tegra_soc_pingroups[]; extern const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[]; +extern const int gpio_to_pingroup[]; int tegra_pinmux_get_func(enum tegra_pingroup pg); int tegra_pinmux_set_tristate(enum tegra_pingroup pg, enum tegra_tristate tristate); +int tegra_pinmux_get_pingroup(int gpio_nr); int tegra_pinmux_set_pullupdown(enum tegra_pingroup pg, enum tegra_pullupdown pupd); |