diff options
| author | Mark Stadler <mastadler@nvidia.com> | 2012-07-31 17:48:27 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 13:19:49 -0700 |
| commit | 3ec14c960357faaa5bb8dccea30780fc005019a5 (patch) | |
| tree | 166db9e46db762a7a835dd66852fecbaf79b4a58 /arch/arm/mach-tegra/iomap.h | |
| parent | 47d3c363a5747e2bf5cc286c68ac6fba9b3ffa90 (diff) | |
ARM: tegra: Update iomap for Tegra12x
Change-Id: I11e6956d182f9787d79651b91c8270d27ce2807d
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Signed-off-by: Jin Qian <jqian@nvidia.com>
Reviewed-on: http://git-master/r/82933
Reviewed-by: Ken Adams <kadams@nvidia.com>
Signed-off-by: Mark Stadler <mastadler@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/iomap.h')
| -rw-r--r-- | arch/arm/mach-tegra/iomap.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/iomap.h b/arch/arm/mach-tegra/iomap.h index 3f6520143fab..4866a68f6e74 100644 --- a/arch/arm/mach-tegra/iomap.h +++ b/arch/arm/mach-tegra/iomap.h @@ -105,6 +105,11 @@ #define TEGRA_DSI_BASE 0x54300000 #define TEGRA_DSI_SIZE SZ_256K +#if defined(CONFIG_ARCH_TEGRA_VIC) +#define TEGRA_VIC_BASE 0x54340000 +#define TEGRA_VIC_SIZE SZ_256K +#endif + #define TEGRA_DSIB_BASE 0x54400000 #define TEGRA_DSIB_SIZE SZ_256K @@ -114,6 +119,12 @@ #define TEGRA_TSEC_BASE 0x54500000 #define TEGRA_TSEC_SIZE SZ_256K +#define TEGRA_SOR_BASE 0x54540000 +#define TEGRA_SOR_SIZE SZ_256K + +#define TEGRA_DPAUX_BASE 0x545c0000 +#define TEGRA_DPAUX_SIZE SZ_256K + #if defined(CONFIG_ARCH_TEGRA_2x_SOC) #define TEGRA_GART_BASE 0x58000000 @@ -707,6 +718,9 @@ #define TEGRA_SIM_ETH_SIZE SZ_64K #endif +#if defined(CONFIG_ARCH_TEGRA_2x_SOC) || defined(CONFIG_ARCH_TEGRA_3x_SOC) || \ + defined(CONFIG_ARCH_TEGRA_11x_SOC) || defined(CONFIG_ARCH_TEGRA_14x_SOC) + #define TEGRA_SDMMC1_BASE 0x78000000 #define TEGRA_SDMMC1_SIZE SZ_512 @@ -719,6 +733,22 @@ #define TEGRA_SDMMC4_BASE 0x78000600 #define TEGRA_SDMMC4_SIZE SZ_512 +#else + +#define TEGRA_SDMMC1_BASE 0x700b0000 +#define TEGRA_SDMMC1_SIZE SZ_512 + +#define TEGRA_SDMMC2_BASE 0x700b0200 +#define TEGRA_SDMMC2_SIZE SZ_512 + +#define TEGRA_SDMMC3_BASE 0x700b0400 +#define TEGRA_SDMMC3_SIZE SZ_512 + +#define TEGRA_SDMMC4_BASE 0x700b0600 +#define TEGRA_SDMMC4_SIZE SZ_512 + +#endif + #define TEGRA_USB_BASE 0x7D000000 #define TEGRA_USB_SIZE SZ_16K |