diff options
| author | Krishna Reddy <vdumpa@nvidia.com> | 2013-02-19 11:26:53 -0800 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 13:00:35 -0700 |
| commit | a22b880179dc68789f9ce708cf1f23357f6ecf43 (patch) | |
| tree | 0715b6b19061f212083e09fcda2a3d6b348d2ae1 /arch/arm/mach-tegra/la_priv.h | |
| parent | e19568b662f8af4fd034e55476b2ba8b5a0ae2e0 (diff) | |
arm: tegra: la: restore ptsa and la to values to same as before suspend
add support to disable display la and ptsa updates.
add chip specific la and ptsa resume support.
Change-Id: Ib1fed1829187a3a23426c3f7dfaf838fbd780de0
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/202087
(cherry picked from commit eef6b14b98044c56b444bd824a0eb63f5393ba48)
Reviewed-on: http://git-master/r/204317
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/la_priv.h')
| -rw-r--r-- | arch/arm/mach-tegra/la_priv.h | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/la_priv.h b/arch/arm/mach-tegra/la_priv.h index f36ec428172b..7cdbda8e4bde 100644 --- a/arch/arm/mach-tegra/la_priv.h +++ b/arch/arm/mach-tegra/la_priv.h @@ -64,6 +64,7 @@ struct la_client_info { char *name; bool scaling_supported; unsigned int init_la; /* initial la to set for client */ + unsigned int la_set; }; struct la_scaling_info { @@ -88,6 +89,38 @@ struct la_scaling_reg_info { unsigned int th_shift; }; +struct ptsa_info { + unsigned int dis_ptsa_rate; + unsigned int dis_ptsa_min; + unsigned int dis_ptsa_max; + unsigned int disb_ptsa_rate; + unsigned int disb_ptsa_min; + unsigned int disb_ptsa_max; + unsigned int ve_ptsa_rate; + unsigned int ve_ptsa_min; + unsigned int ve_ptsa_max; + unsigned int ring2_ptsa_rate; + unsigned int ring2_ptsa_min; + unsigned int ring2_ptsa_max; + unsigned int bbc_ptsa_rate; + unsigned int bbc_ptsa_min; + unsigned int bbc_ptsa_max; + unsigned int mpcorer_ptsa_rate; + unsigned int mpcorer_ptsa_min; + unsigned int mpcorer_ptsa_max; + unsigned int smmu_ptsa_rate; + unsigned int smmu_ptsa_min; + unsigned int smmu_ptsa_max; + unsigned int ring1_ptsa_rate; + unsigned int ring1_ptsa_min; + unsigned int ring1_ptsa_max; + + unsigned int dis_extra_snap_level; + unsigned int heg_extra_snap_level; + unsigned int ptsa_grant_dec; + unsigned int bbcll_earb_cfg; +}; + struct la_chip_specific { int ns_per_tick; int atom_size; @@ -100,6 +133,9 @@ struct la_chip_specific { struct la_scaling_info scaling_info[ID(MAX_ID)]; int la_scaling_enable_count; struct dentry *latency_debug_dir; + struct ptsa_info ptsa_info; + bool disable_la; + bool disable_ptsa; void (*init_ptsa)(void); void (*update_display_ptsa_rate)(unsigned int *disp_bw_array); @@ -109,6 +145,8 @@ struct la_chip_specific { unsigned int threshold_mid, unsigned int threshold_high); void (*disable_la_scaling)(enum tegra_la_id id); + int (*suspend)(void); + void (*resume)(void); }; void tegra_la_get_t3_specific(struct la_chip_specific *cs); |